Shanghai, June 24, 2025 — As the RISC-V ecosystem continues to evolve toward greater standardization and high-performance computing, the demand for processors that offer virtualization, secure isolation, and high concurrency is growing rapidly. Today, Nuclei System Technology officially announced the launch of its next-generation high-performance processor IP, the UX1030H. Fully compliant with the RVA23 Profile, UX1030H supports virtualization, vector computation, and extends functionality to include IOMMU and Advanced Interrupt Architecture (AIA). Designed for secure, scalable next-generation applications, this release marks a key milestone in the maturity of high-performance RISC-V processor IP and its readiness for complex system-level deployments.
RISC-V Ecosystem Gains Momentum: IP Becomes Essential
As the world’s only open and extensible mainstream instruction set architecture, RISC-V is quickly scaling into industrial-grade applications. Its openness and modularity are driving innovation and new approaches in processor design and software compatibility.
The availability of high-quality RISC-V processor IP is essential for this growth. These IPs serve as foundational building blocks for chip production, and are crucial for ensuring software compatibility, especially with modern operating systems and development ecosystems.
According to SHD Group, global RISC-V-based SoC shipments are projected to reach 20 billion units by 2031, representing 25% of the worldwide market. As adoption expands from traditional control-class applications to edge computing, smart gateways, and AI inference, the demand for robust, scalable, and ecosystem-ready RISC-V CPUs is accelerating.
In this landscape, ecosystem friendly high-performance RISC-V IP is essential for driving the next wave of innovation.
Rising Demand for High-Performance RISC-V Processors
RISC-V has rapidly gained traction in low- and mid-power processor segments, especially in general-purpose computing at performance levels similar to Arm Cortex-A53/A55. Mature ecosystems and tools now support applications such as smart devices, edge gateways, and low-power AI, with processors like Nuclei’s UX900 series leading the charge.
The market is now progressing toward processors targeting performance levels comparable to Cortex-A72, with emerging use cases including:
- Edge AI inference engines
- ADAS and virtualization-ready platforms for automotive systems
- High-performance industrial and edge servers
- Main control and virtualized compute environments in heterogeneous SoCs
With support for the RISC-V Vector extension, the architecture is unlocking new levels of flexibility and performance in parallel computing and AI inference. This shift from control-class cores to general-purpose processors is accelerating, and commercially viable, standardized high-performance IP will be the cornerstone of future computing platforms.
RVA23 Compliance and Ecosystem Readiness
Nuclei’s UX1030H is fully compliant with the RVA23 Profile, balancing ecosystem compatibility with performance, and is a critical component in enabling high-end RISC-V deployments.
The RVA23 Profile is a software-driven standard that defines feature requirements for 64-bit high-performance RISC-V processors, mandating support for key extensions such as Hypervisor and Vector. UX1030H is built to these specifications and is fully capable of running modern operating systems and virtualization frameworks, while integrating smoothly with the expanding RISC-V software ecosystem.
RVA23 is also the defined baseline for enabling Android on RISC-V platforms. Leading ecosystem contributors including Google, Red Hat, and Canonical are actively building next-generation software stacks around RVA23, making it a launchpad for broader adoption in general-purpose computing environments.
Additional capabilities of UX1030H include:
- IOMMU：for secure peripheral access and memory management
- AIA：Provide a high-performance, scalable, and virtualization-capable interrupt handling framework for RISC-V systems, significantly improving interrupt efficiency and flexibility in multicore and virtualized environments.
Together, these features not only ensure compliance with RVA23 but also deliver the performance and system-level capabilities needed to support complex workloads such as virtualization, high-reliability device integration, and Android deployment.
Building on UX1000 Microarchitecture Platform
UX1030H builds on Nuclei’s proven UX1000 micro-arch platform, delivering enhanced parallel computing performance and scalability. The processor features a 3-decode out-of-order execution architecture with deep pipelining, optimized for high-load and intensive scheduling scenarios.
Key specifications include:
- 12-stage out-of-order pipeline
- Up to 6 scalar and 2 vector instruction issues per cycle
- Full support for RISC-V Vector 1.0, configurable with up to 256-bit (VLEN=DLEN=256) vector processing width, ideal for compute-intensive tasks such as AI inference, image processing, and signal analysis
- Support for L1 I/D cache, ILM/DLM and Cluster Cache
UX1030H also supports multi-core cluster designs, with up to 16 cores per cluster and multi-level cache coherency, ideal for high-parallel platforms such as data center accelerators, in-vehicle compute units, and edge servers.
Currently undergoing design-in phase with partners, the UX1030H reaches 1.6GHz under a T22 process. The following diagram illustrates a typical floorplan configuration of the UX1030H, highlighting its area efficiency and integration-oriented layout.
Standard Instruction Set, Leading Performance
UX1030H delivers industry-leading benchmark scores:
- 5.35 DMIPS/MHz on Dhrystone (with -fno-inline)
- 8.5 CoreMark/MHz on CoreMark
These results are achieved using only standard RISC-V instructions, with no proprietary extensions, ensuring transparency, fairness, and cross-platform compatibility. The performance reflects deep architectural optimizations across execution units, instruction scheduling, pipeline design, and cache systems.
Unlike approaches that rely on custom instructions to boost benchmark scores, UX1030H achieves its results strictly within the standard RISC-V ISA, enhancing software portability and long-term maintainability. Its integrated Vector Processing Unit (VPU) also delivers significant acceleration for workloads such as image processing, tensor computations, and encryption.
System-Level Innovation for Modern SoCs
In addition to core microarchitectural performance, UX1030H integrates system-level features that improve integration and runtime efficiency in advanced SoCs:
- Dual Modes
UX1030H supports both Linux-based application mode and real-time mode. This enables flexible adaptation to a range of scenarios, from low-latency control tasks to full-stack application environments.
- Cluster Local Memory (CLM)
UX1030H allows Cluster Cache to be configured as CLM, with interfaces enabling shared access by multiple cores or compute modules, supporting real-time workloads across AI accelerators, image processors, and DSPs.
- IO Coherency Port (IOCP)
UX1030H includes a configurable IOCP, enabling coherent data sharing between external masters (e.g., NPUs, accelerators, PCIe controllers, DMA) and processor cores or caches:
- Maintains cache coherence without software intervention
- Reduces I/O latency and boosts bandwidth across heterogeneous compute systems
Mature Software Ecosystem with Global Collaboration
The RISC-V software ecosystem is expanding rapidly, with growing support across compilers, toolchains, operating systems, virtualization platforms, and middleware. Components like LLVM, GCC, glibc, Linux kernel, and QEMU offer long-term upstream support, and operating systems such as Android, Debian, and OpenEuler have adapted to the RVA Profile.
RVA23 offers a unified software architecture for high-performance RISC-V platforms, especially for Android. Ecosystem contributors are aligning around this standard, driving broader adoption and ensuring compatibility across platforms.
Nuclei actively invests in software ecosystem development, offering SDKs, GNU toolchains, GDB, driver templates, and RTOS/Linux validation for its UX series processors. The company contributes to open-source initiatives including OpenEuler and Android on RISC-V.
Thanks to strict adherence to the standard RISC-V ISA and full toolchain support, UX1030H ensures excellent software compatibility and integration flexibility for global developers.
CEO Statement
Bob Hu, Founder of Nuclei System Technology:
“The launch of UX1030H marks a key milestone in our journey to deliver high-performance RISC-V processor IP. As one of the first commercially available CPUs fully compliant with the RVA23 Profile, UX1030H demonstrates our commitment to performance, ecosystem alignment, and architectural openness.”
“Since our founding in 2018, we have remained focused on innovation and customer needs, developing a comprehensive product line from 32-bit to 64-bit and supporting both general-purpose and specialized computing.”
“We now serve over 300 customers worldwide, offering broad coverage and delivery capabilities. Looking ahead, we will continue to advance high-performance, low-power, and secure computing technologies, empowering smart computing platforms and driving forward the RISC-V ecosystem.”
Strengthening High-End IP and Enabling Platform Transition
The release of UX1030H further strengthens Nuclei’s high-end RISC-V IP portfolio and supports the migration of software ecosystems to general-purpose RISC-V platforms.
Nuclei will continue to develop its product roadmap across general computing, AI processing, secure isolation, and virtualization, building a richer, more powerful RISC-V processor ecosystem for the global computing future.
