Skip to main content

RISC-V Summit North America 2025 · Santa Clara, California - Oct 22-23 · Register Now

The EPAC 1.0 test chip is now ready to be sent to fabrication, It contains a number of accelerator cores some based on RISC-V instruction set architecture.

The EPI, a consortium of 28 partners from 10 countries, is set to receive €120 million from European Union taxpayers under the Horizon 2020 scheme to bolster its attempt to provide European independence in HPC chip technologies and HPC infrastructure.

Read the full article