Tom's Hardware Article: European Processor Initiative Delivers First Designs

Six months after starting up, the European Processor Initiative (EPI) has delivered its first architectural designs to the European Commission, completing the first phase of the project. The goal of the initiative is to create a new family of low-power European processors, primarily aimed at high-performance computing (HPC), the first of which is slated for 2021.
The accelerators, in particular, are seen as crucial to improving performance and reducing power consumption. EPI has described two kinds of accelerators: one based on the open source RISC-V instruction set architecture (ISA), and another one based on Kalray’s IP, a French company that builds many-core processors based on the very long instruction word (VLIW) ISA. The RISC-V technology will be used to build multiple accelerators for HPC and AI, such a vector processing unit (VPU), a stencil/tensor accelerator (STX) and a variable precision co-processor (VRP). The Kalray accelerator, on the other hand, is aimed at “deterministic automotive computation.”
 
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