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Codasip introduces best-in-class RISC-V core for power-efficient applications

By June 12, 2024No Comments1 min read
  • Marketing Specialist, RISC-V International

    Anisha is part of the RISC-V International marketing team, responsible for managing social media and tracking the latest updates from our members. She brings more than seven years of experience in digital marketing and communications strategy to the team.


Munich, Germany, June 4, 2024 – Codasip, the leader in RISC-V Custom Compute, has introduced a new low-power embedded processor core, and the next generation of processor design automation toolset Codasip Studio. Codasip L110 delivers best-in-class performance for power-sensitive applications. In addition, customers can easily add their unique customizations for unprecedented application-specific PPA (Power, Performance, and Area) improvements.  A new level of customization in Codasip Studio Fusion, Bounded Customization, lets customers achieve a fast time to market for high-quality, fully verified RISC-V cores. The core can be extended with new instructions without risk because the functionality of the baseline core is guaranteed. A new verification framework substantially simplifies the verification of custom instructions.

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