SiFive has modified its high end RISC-V core for more scalability in datacentre AI chip designs.
The P870-D datacentre RISC-V IP is a variant of the previous P870 so that it scales to 256 cores and adds other features for datacentre AI chips.
The P870-D supports the open AMBA CHI protocol and other industry-standard protocols, including Compute Express Link (CXL) and CHI chip to chip (C2C) for heterogeneous system on chip (SoC) and chiplet configurations. SiFive is also working with Arteris for network on chip (NoC) implementations with a distributed and scalable IOMMU for accelerating virtualized device IO, which is also critical to address the latest functional safety and security requirements.
