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RISC-V Honors Outstanding Technical and Community Contributions for 2022

By December 23, 2022No Comments

Recipients Selected from Tens of Thousands of Engineers Working on RISC-V Initiatives Globally

San Jose, Calif. – Dec. 21, 2022 RISC-V International, the global open standards organization, announced the recipients of its 2022 Technical and Community Awards. Winners were honored during the recent global RISC-V Summit, as the RISC-V community celebrated its impressive growth and technical progress over the past year.

Today, there are more than 10 billion RISC-V cores in the market, and tens of thousands of engineers working on RISC-V initiatives worldwide. 

“Our vision for 2022 was to bring RISC-V everywhere, and that has been made possible by the strength, commitment, and collaboration across the global community,” said Calista Redmond, CEO of RISC-V International. “One of RISC-V’s greatest strengths is the community, and leveraging its collective resources has been a significant driver behind the billions of RISC-V cores in the market. We are truly grateful for the contributions of so many, and especially for those who have stepped up through their leadership and dedication to go above and beyond in driving momentum and adoption of RISC-V.”

The 2022 award winners are:

Board of Directors Technical Leadership Award – In recognition of profound technical contribution and leadership in collaboration across the RISC-V community to further technical progress and industry adoption:

  • Allen Baum, Esperanto Technologies, Inc.
  • Anup Patel, Ventana Micro Systems
  • Ved Shanbhogue, Rivos, Inc.

Technical Contributor Award – In recognition of technical leadership, numerous contributions, and community collaboration:

  • Kevin Chen, Andes Technology
  • Andrew Dellow, Huawei UK
  • Tariq Kurd, Codasip
  • Yunsup Lee, SiFive

Software Leadership Award – In recognition of profound software contribution and leadership in collaboration across the RISC-V community:

  • Anup Patel, Ventana Micro Systems
  • Chen Wei, Alibaba Cloud

Software Contributor Award – In recognition of software leadership, numerous contributions, and community collaboration:

  • Alistair Francis, Western Digital 
  • Craig Topper, SiFive
  • Kito Cheng, SiFive
  • Juzhe Zhong, Rivai
  • Manolis Tsamis, VRULL
  • Palmer Dabbelt, Rivos, Inc.
  • Richard Henderson, Linaro
  • Sunil V L, Ventana Micro Systems
  • Tommy Murphy, Individual Contributor

Community Leadership Award – In recognition of leadership, evangelism, and community outreach that brought the community together and grew the contribution efforts of the community:

  • Wei Wu, Programming Language and Compiler Techniques Lab at the Institute for Software at the China Academy of Sciences (ISCAS)

Ratification Award

  • Standalone Multiple (Zmmul) – Fast Track Chair: Allen Baum, Esperanto Technologies, Inc.
  • Wait on Reservation Set (WRS) – Fast Track Chair: Ved Shanbhogue, Rivos, Inc.
  • Efficient Trace (E-Trace) – Chair: Gajinder Panesar, Picocom
  • Processor Specific Application Binary Interface (psABI) – Chair: Kito Cheng, SiFive
  • System Binary Interface (SBI) – Chair: Atish Patra, Rivos, Inc.
  • Unified Extensible Firmware Interface Standard (UEFI) – Chair: Sunil VL, Ventana Micro Systems

For information on past winners, please visit the RISC-V Hall of Fame.

About RISC-V International

RISC-V International is the non-profit home of the open standard RISC-V Instruction Set Architecture (ISA), related specifications, and stakeholder community. More than 3,180 RISC-V members across 70 countries contribute and collaborate to define RISC-V open specifications as well as convene and govern related technical, industry, domain, and special interest groups. RISC-V combines a modular technical approach with an open, royalty-free license model — meaning that anyone, anywhere can benefit from the IP contributed and produced by RISC-V. RISC-V enables the community to share technical investment, contribute to the strategic future, create more rapidly, enjoy unprecedented design freedom, and substantially reduce the cost of innovation. To learn more, visit

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