In just two years, Semidynamics has “evolved from RISC-V with AI to AI with RISC-V”, Semidynamics’ chief sales officer Volker Politz said at this week’s RISC Summit Europe 2025 in…
By: Stephen Di Camillo, Technical Marketing and Business Development Manager Embedded system developers facing the increasingly complex challenge of certifying embedded applications running on complex SoC FPGAs can reduce software…
Flow Computing in Finland has started alpha testing of a RISC-V compiler for its Parallel Processing Unit (PPU) AI block. The PPU is capable of increasing any CPU architecture by up…
Laguna Hills, California. BrainChip Holdings Ltd released information it is now integrating Andes Technology’s RISC-V cores with its NPUs. According to the press release, the companies will exhibit BrainChip’s Akida AKD1500 on Andes’ QiLai…
RISC-V International and the RISE Project are teaming up to participate in the Yocto Project. RISC-V International has upgraded from Silver to a Platinum membership and will participate with governance…
RISC-V pioneer SiFive has announced a partnership with energy-efficient edge artificial intelligence (edge AI) specialist Kinara to launch a USB gadget designed to provide developers with access to RISC-V cores…
RISC-V International has appointed Andrea Gallo as CEO, effective immediately. Previously vice president of Technology at the organization, Gallo brings extensive experience in open ecosystems and leadership from his roles…
RISC-V International announces Andrea Gallo as the organization’s new CEO, effective immediately. Gallo has served as Vice President of Technology at RISC-V International since June 2024. In his role leading…
Beijing, April 16, 2025 — The RISC-V Talent Training Specification Workshop, organized by the Beijing Institute of Open Source Chip (BOSC) was convened. The workshop brought together over 40 experts…
At last month’s Andes Technology RISC-V Con event in San Jose, CA, the company announced a number of partnerships with companies like Imagination Technologies, Baya Systems, S2C and Brainchip as…