RISC-V Community News

Mar 22

Tenstorrent and MosChip Partner on High Performant RISC-V Design

By RISC-V Community News Ecosystem News

SANTA CLARA, Calif., March 13, 2024 /PRNewswire/ --Tenstorrent and MosChip Technologies announced today that they are partnering on design for Tenstorrent's cutting-edge RISC-V solutions. In selecting MosChip Technologies, Tenstorrent stands to strongly…

Mar 21

BRAZIL AND EUROPE SIGN INNOVATIVE PROJECT WITH RISC-V TECHNOLOGY FOR HPC

By RISC-V Community News Blog

An international collaboration will enable Brazil to develop RISC-V technologies to accelerate research and development in the areas of semiconductors and supercomputing in the country. This innovative project marks the…

Mar 20

MIPS Expands Global Footprint with New Design Center and Talent for Systems Architects and AI Compute

By RISC-V Community News Ecosystem News

SAN JOSE, Calif.--(BUSINESS WIRE)--MIPS, a leading developer of efficient and configurable compute cores, today announced the company’s global expansion with the launch of a new R&D center in Austin, TX,…

Mar 20

StarFive’s RISC-V Based JH-7110 Intelligent Vision Processing Platform Adopted VeriSilicon’s Display Processor IP

By RISC-V Community News Ecosystem News

SHANGHAI--(BUSINESS WIRE)--VeriSilicon (688521.SH) today announced the successful integration of its Display Processor IP DC8200 into StarFive’s JH-7110 RISC-V mass production SoC. With high performance, low power consumption and high security…

Mar 20

A custom RISC-V vector instruction to accelerate structured-sparse matrix multiplications

By RISC-V Community News Ecosystem News

A novel AI-acceleration paper presents a method to optimize sparse matrix multiplication for machine learning models, particularly focusing on structured sparsity. Structured sparsity involves a predefined pattern of zero values in the…

Mar 15

[VIDEO] BeagleV-Fire Out of Box Experience | RISC-V & FPGA | Microchip PolarFire | BeagleBoard.org

By RISC-V Community News Ecosystem News

Watch the full video.

Mar 15

Advanced RISC-V Training Course | Maven Silicon – RISC-V Global Training Partner

By RISC-V Community News Blog

By Sivakumar P R In this video, our Founder and CEO, Mr. P R Sivakumar, explains how he has authored the new RISC-V training course and how we use this…

Mar 15

RISC-V International Newsletter – March 2024

By RISC-V Community News RISC-V News

Message from RISC-V International 2024 is now well underway and we have some exciting new developments from our members worldwide! RISC-V is truly a global ecosystem, and last month we…

Mar 15

Introducing the RISC-V Enterprise Software Ecosystem Dashboard

By RISC-V Community News Blog

Author: Isaac Chute, Director of Software Ecosystem, RISC-V International Historically there have been many iterations of compute platforms, such as Alpha, Vax, Solaris, PA-RISC, x86, PPC, and s390, to mention…

Mar 14

Securing software execution with CHERI on a Codasip A730 RISC-V core

By RISC-V Community News Blog

Author: Roddy Urquhart, Sr Technical Marketing Director, Codasip Introducing CHERI With cyber-attacks on systems growing in frequency and sophistication it is essential to improve the security of software execution. Many…

Tenstorrent and MosChip Partner on High Performant RISC-V Design

BRAZIL AND EUROPE SIGN INNOVATIVE PROJECT WITH RISC-V TECHNOLOGY FOR HPC

MIPS Expands Global Footprint with New Design Center and Talent for Systems Architects and AI Compute

StarFive’s RISC-V Based JH-7110 Intelligent Vision Processing Platform Adopted VeriSilicon’s Display Processor IP

A custom RISC-V vector instruction to accelerate structured-sparse matrix multiplications

[VIDEO] BeagleV-Fire Out of Box Experience | RISC-V & FPGA | Microchip PolarFire | BeagleBoard.org

Advanced RISC-V Training Course | Maven Silicon – RISC-V Global Training Partner

RISC-V International Newsletter – March 2024

Introducing the RISC-V Enterprise Software Ecosystem Dashboard

Securing software execution with CHERI on a Codasip A730 RISC-V core

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