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RISC-V Webinar with Andes and Imperas: “RISC-V Design Innovations with Custom Extensions.”

On Thursday, Feb. 23rd, Andes and Imperas held a webinar on “RISC-V Design Innovations with Custom Extensions.” At the end of the formal remarks, the presenters answered questions submitted by attendees when they registered and those that came in during the formal remarks. Below is a transcript of the Q&A. 

If you wish to view the entire webinar, please click either of the following links

https://youtu.be/HrVE0Bw8mlE (Imperas website)

https://youtu.be/0WiSdSHQUIg (Andes Website)   

Audio for the Q&A begins at the time stamp 29:32.


Kat Hsu: All right. I am going to hand it back to Jonah to run our Q and A part. Thank you everyone.

Jonah McLeod: Hello everyone. Thank you for joining us. We didn’t have any questions come in through chat or Q and A but we did have questions that arose during the registration process. So I will go through a handful of these to make sure that we’ve got everything covered. First one is, do custom instructions need to be open source?

John Min: The idea of custom instructions is it creates instructions for yourself and you do not have to open source it at all. You can keep it secret. It’s your secret sauce. If anybody disassembles your code all they will see is op code <my custom instruction>. One, two, three, four, whatever and then the source operand.

So they will have to work at that to figure out what it’s doing. Well, they have customers, create custom instructions, lock out the binary from running on other RISC-V processors. So there are some interesting things you could do for custom instructions. But they do not have to be open source.

Kat Hsu: Let me answer that in the Imperas side. The Imperas models are available under Apache 2.0 license which means that you can take it, change it and without having to publish it. So custom instructions do not need to be open source. In fact, part of the reason that we automated the flow with Andes is that we have customers that want to keep them secret from their vendors as well. So that’s why we automated it.

Jonah McLeod: OK. Next question. How are custom instructions supported in the software tool chain?

John Min: There are two ways to go about doing this. The COPILOT will generate intrinsics that you could use as – it would be like calling a subroutine, calling an intrinsic. Changing the compiler, they work. So especially with verification. COPILOT is optimizing it, making the custom instructions easy by generating intrinsics. You could call like with subroutine.

Kat Hsu: The way that we designed how our extensions work is that will work automatically with our tools: multiprocessor debugger and verification/analysis/profile (VAP).

Jonah McLeod: Next question. Can custom instructions be used for an application running on RTOS?

John Min: Jonah, can you repeat that for me?

Jonah McLeod: Can custom instructions be used for an application running on RTOS?

John Min: Sure. Custom instruction could be used anywhere. In fact it has been used to accelerate RTOS as well for contact switching. So you need to understand where it can be used. Think of custom instructions as replacing subroutines like function calls. You create – in fact you’re creating a new function call. That if you create – Think of it as that concept. You can create custom instructions.

Kat Hsu: Yeah.

Jonah McLeod: All right. Why is the RISC-V custom instructions different from other cores that had offered this in this past, like MIPS and Tensilica and those?

John Min: Yeah. there have been two kinds of custom extensions, right? Custom instructions that are created by MIPS and even Arm I think have that mechanism. You could create instructions and I think Synopsys does that as well. You create instructions to accelerate performance.

Something that’s different for Andes is you could create local memories, local states and acceleration ports. So it’s much more than just custom instructions. Tensilica actually, I believe, is in – offers something similar to Andes in that they offer custom instructions, custom memories and custom ports. So the ability we offer is all these capability for custom extensions on top of standard RISC-V instruction set.

Jonah McLeod: All right. Next question. How do you handle ongoing maintenance and ecosystem conflicts?

John Min: Well, so there are really no conflicts with custom extensions as long as you keep it custom for you. For our customers, Andes, the COPILOT and our software tools work together, compilers, to make sure that any instruction generated using COPILOT is supported by our software compiler and debugger and we push those up into the head of tree. So we keep it working well. So sometimes it needs compiler extensions, specific intrinsics or data types. We make sure that if the COPILOT instruction is generatable by COPILOT, it is supported by software.

John Min. There’s a question in the Q and A. Can you please share what kind of custom extensions Andes has on top of latest RISC-V core? Basically we have standard extensions, right? That’s different than RISC-V or on top of RISC-V. We have a CoDense that reduces code size. We have StackSafe to protect stack overflow, underflow, bugs, issues. 

We have a PowerBrake for power management and software control frequency scaling of a pipeline. So those are called standard extensions. Custom extensions, whatever you can imagine and create. We have some examples just you saw. There are tripleDES. They are some of other algorithmic examples to get you started or doing evaluation. 

Jonah McLeod: OK. I have one more for Kat. I’m building an SoC that needs environment input. We need audio, to test the audio decoder for example. How do you direct the audio to the virtual platform?

Kat Hsu: Oh, OK. That’s a terrific question. We have a capability called “semi-hosting” that I didn’t get to mention on my slide. But what it is, is that we leverage the host machine’s resources. So the simulator will be running on some big x86 server type and for example for an audio input, we can leverage the host machine input to get the audio file and that will become stimulus to our simulator.

John Min: OK. There’s another question from an anonymous attendee. Can you share information if there’s a matrix instruction extension underway? There are two ways. RISC-V is always evolving. So there are always instructions being proposed and the committee is debating on. There has been a bitwise operation extension that’s recently been approved. There’s a vector instruction set that has been approved. There’s a DSP instruction set that is going through approval and additionally you can create custom matrix instructions. 

So we have interdot multiply custom instruction example. So there are many examples. There are some open source projects I’ve been following for matrix calculations where somebody was doing 128 by 128 square matrix and they were able to achieve over 200 X acceleration with custom instructions using RISC-V.

So there are a lot of examples out there and that’s one of the reasons why we adopted RISC-V as base architecture for community reuse of instructions and if you create some instructions and if you’re kind enough to publish it, then you can help the community as well. But that’s not required.

Kat Hsu: So now I want to comment on the custom extension part. From Imperas side, we see that almost every customer is doing custom extensions. The ones that we know of are in the areas of memory access and security and more complex customizations in the area of interrupt schemes and modifications to the Core Level Interrupt Controller (CLIC).  

Jonah McLeod: All right. Question on Q and A. Is it possible to do a hardware-software codesign on FPGA with Imperas tools?

Kat Hsu: The answer is yes and that’s something that we have done with customers. I will take that offline with the person asking the question. But just to summarize, we interface to emulators, pipeline simulators and other EDA tools. 

Jonah McLeod: All right. Any more comments from the presenters or any other questions they would like to answer? John? Kat?

John Min: Just to let everybody know, I think Jonah is supposed to say this. But every attendee will get a link to the video webinar.

Jonah McLeod: Yes, for sure. Webinar video links below:

Andes Website:  https://youtu.be/0WiSdSHQUIg

Imperas website: https://youtu.be/HrVE0Bw8mlE

Kat Hsu: And we also – as John mentioned at the beginning, we are looking for input to structure this into an ongoing series. So please give us input.

John Min: Yeah, and a lot of the tools we mentioned like the COPILOT or the Imperas tools will become webinar by itself. So stay tuned to this channel.

Jonah McLeod: All right. Well, thank you for joining us and we will be sending out notifications of our future webinars and please be sure to join us at that time. 

John Min: Thank you.

Jonah McLeod: Thank you.

[End of transcript]

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