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RISC-V Summit China 2025: Reflections from a RISC-V Software Contributor

By July 24, 2025July 28th, 2025No Comments

By Guodong Xu, Director China Operations, RISCstar Solutions

The 2025 RISC-V Summit China reached an unprecedented level of excitement, drawing a record-breaking crowd of over 4,000 attendees. The main venue was filled to capacity, with many standing along the walls just to be part of the event. This was my second time attending the RISC-V Summit, since starting development work on RISC-V, and in just two days, there was a lot to take in and reflect upon.

CUDA is Coming to RISC-V — The Biggest News of the Summit

If there’s one statement that defines this year’s summit, it would be: “CUDA is coming to RISC-V.”

Frans Sijstermans, NVIDIA’s VP of Hardware Engineering, delivered a keynote “Enabling RISC-V Application Processors in NVIDIA Compute Platforms,” where he announced that NVIDIA is actively porting the CUDA ecosystem to RISC-V CPUs.

People were clearly excited about this pivotal step for RISC-V in the high-performance computing space. Once CUDA officially lands on RISC-V, these CPUs will stand shoulder to shoulder with Arm and x86 as fully supported compute platforms for NVIDIA GPUs. For RISC-V CPU vendors—especially in China—this creates a rare and valuable window of opportunity.

Of course, this also raises the bar: future ecosystem development will require more than just CPU capability. That means that key hardware factors like memory bandwidth and inter-chip interconnects will become critical battlegrounds for performance.

A Strong Lineup of International Speakers — “RISC-V Poised for a Big 2025”

Compared to previous years, this summit saw a significant increase in the presence of international experts. I counted about seven international speakers out of 16 keynotes who flew in from overseas to attend.

Their talks were varied and impressive, with a particular emphasis not only on architectural trends but also on the importance of software ecosystems. What I found interesting was the growing attention of the global RISC-V community to the Chinese market and developer base.

Notable speakers included familiar faces and industry leaders:

Plenty of RVA23 announcements, zero tapeouts. Talk is cheap, silicon isn’t!

Since the RVA23 specification was ratified in October 2024, RISC-V CPUs compliant with the standard have become a central theme for vendors at the summit:

  • SpacemiT X100 / X200
  • BOSC “Xiangshan” series: Nanhu V5, Kunminghu V2
  • Tenstorrent TT-Ascalon™ X Core
  • SiFive P870-D
  • Alibaba DAMO Xuantie C930

I remain skeptical until I see actual silicon, as most of these are still at the IP stage and have not yet been taped out. Currently, SpacemiT(进迭时空) appears to be the most likely to reach mass production first worldwide with two CPUs: K3 (16 cores) and V100 (64 cores). I was told that they are targeting production in Q4 this year.  SpacemiT’s clear and well-defined roadmap made a real splash: they were one of the most talked-about Chinese vendors at the summit.

Ecosystem. Still Ecosystem. Always Ecosystem.

A key moment for me was during Qualcomm SVP Leendert van Doorn’s keynote “Scaling RISC-V: Embracing a Platform and Ecosystem Mindset.” He surprisingly barely mentioned hardware. Instead, he asked a foundational question:

“What does it take for an architecture to scale?”

His answer, in his own words: “Transition our thinking and vocabulary of RISC-V as an ecosystem, not just an ISA”. No single company—not even Qualcomm—can build a complete ecosystem alone. Only community collaboration can bring RISC-V to production scale.

This powerful message was underlined again and again throughout the summit. NVIDIA, for example, showcased its commitment by bringing CUDA to RISC-V, showing that people are finally focusing on software.

It’s also a sentiment our own Head of Engineering, Scott Bambrough, has voiced repeatedly. In his recent blog post (Linux Kernel Technical Debt), he wrote:

“Getting Linux running is often the easy part. Keeping it maintainable, secure, and forward-looking is where the real challenge begins.”

From Qualcomm to NVIDIA to RISCstar, the message is clear: scaling RISC-V isn’t just about building chips—it’s about building a sustainable software ecosystem together.

A Note on RVA Profiles: No RVA24, It’s RVA30

“There will be no RVA24. The next major profile will be called RVA30.” This was a critical assertion during  Krste Asanovic’s keynote speech. 

That may leave you wondering what happens in the years in between. The plan is to follow a versioning scheme similar to Arm’s, with annual incremental releases named RVA23p1, RVA23p2, and so on—akin to Armv8.1, v8.2, etc. This gradual and consistent progression will help stabilize the software ecosystem and offer a clear adaptation path.

Growing Chinese Participation in RISC-V International

Another key takeaway for anyone in attendance was the growth of RISC-V in China. During his speech, RISC-V International CEO Andrea Gallo highlighted the increasing presence of Chinese engineers in key working groups (HC, SIGs, and TGs), many of whom now serve as chairs or vice chairs. It was a gesture of appreciation, and also a recognition that China is no longer just a user of the ecosystem—it is becoming a rule-maker and a technology contributor. 

Final Thoughts

As someone who works on both Arm and RISC-V kernel upstreaming at RISCstar, this summit reinforced both the openness and the challenges of the RISC-V ecosystem. One key takeaway for me:

“Ecosystems are not given—they are built.”

So where is RISC-V headed? If this summit is any indication, the answer is clear:

It’s no longer just an architecture championed by a few companies—it’s a shared ecosystem, shaped by all of us. This newly developing ecosystem is one RISCstar has deep knowledge around. With a global footprint and a team on the ground in China, RISCstar offers a broader, global view that can help Chinese companies implement a competitive strategy. 

About the author: Guodong Xu is the Outreach Ambassador of CRVA (China RISC-V Alliance) and also heads China operations at RISCstar Solutions.