Skip to main content

Thank You For Attending RISC-V Summit North America! | Missed the event? Watch Now.

search
In the Media

Andes Introduces RISC-V Out-of-Order Superscalar Multicore Processor

By January 11, 2024No Comments1 min read
  • Anisha Sharma

    Marketing Specialist, RISC-V International

    Anisha is part of the RISC-V International marketing team, responsible for managing social media and tracking the latest updates from our members. She brings more than seven years of experience in digital marketing and communications strategy to the team.

The new CPU features the company’s first out-of-order architecture for higher instruction throughput, better performance, and faster processing speeds.

Related Posts

In the Media EDN: RISC-V Summit spurs new round of automotive support

EDN: RISC-V Summit spurs new round of automotive support

RISC-V International Staff
RISC-V International StaffNovember 13, 2025
In the Media WebProNews: RISC-V’s ISO Milestone: Open ISA Poised for Global Dominance

WebProNews: RISC-V’s ISO Milestone: Open ISA Poised for Global Dominance

RISC-V International Staff
RISC-V International StaffNovember 13, 2025
In the Media EEWorldOnline: MIPS releases multithreaded processor for edge computing

EEWorldOnline: MIPS releases multithreaded processor for edge computing

RISC-V International Staff
RISC-V International StaffNovember 7, 2025