【Andes Webinar】Releasing All Potential of RISC-V: Total Solutions of Andes Core Processors Series
Speaker: Samuel Chiang , Andes Deputy Director Of Marketing Abstract: In this unique webinar, we take a look at the overview of the latest AndesCore™ RISC-V processor... Read more.
Effectively hiding sensitive data with RISC-V Zk and custom instructions
Cryptographic hash functions play a critical role in computer security providing a one-way transformation of sensitive data. Many information-security applications... Read more.
Navigating the RISC-V Revolution in Europe
IP collaborations helped propel RISC-V-based innovation in Europe last year, targeting processing speeds that meet the growing performance requirements of artificial... Read more.
Catching up with MEEP: Bringing forward the development of tomorrow’s European exascale supercomputing
The EU-funded MEEP project introduced a large-scale field programmable gate array (FPGA) system involving a complete collection of hardware intellectual properties... Read more.
Banana Pi BPI-F3 is a single-board PC with an 8-core RISC-V processor, dual Ethernet and PCIe 2.1
Most of Banana Pi’s single-board computers are powered by ARM-based processors. But the upcoming Banana Pi BPI-F3 has a RISC-V processor instead. The company... Read more.
Klepsydra AI and Frontgrade Gaisler Collaborate to Expand Microprocessing Versatility in Space Missions Through AI
Zurich, 17 January 2024 – Klepsydra AI, a leading provider of artificial intelligence (AI) software solutions, and Frontgrade Gaisler, a world leader in embedded... Read more.
Ashling announces Ashling’s RiscFree™ C/C++ SDK support for Codasip’s RISC-V-based L31 Core
January-30, 2024, Limerick, Ireland. Embedded tools developer Ashling today announced support for the L31 low-power RISC-V processor core from Codasip in Ashling’s... Read more.
Codasip achieves certification for automotive functional safety and cybersecurity
Munich, Germany, 1 February 2024 – Codasip®, the leader in RISC-V Custom Compute, announced today that it has achieved certification for the functional safety... Read more.
RISC-V Based Architecture Integrates Complex Memory Tasks to Processor
Processor Akurra, modifies the standard RISC-V architecture and instruction set to support their memory allocation technology. VyperCore, a UK-based startup located... Read more.
BellSoft releases Liberica JDK 21 for RISC-V with support
SAN JOSE, Calif., Jan. 30, 2024 /PRNewswire/ — RISC-V is a free, open RISC instruction set architecture (ISA) that is currently gaining popularity due... Read more.