Ultra-Low-Power RISC-V System-on-Chip features Adaptive Body Biasing Technology | Abhishek Jadhav, CNX Software
CSEM and USJC together have developed an ultra-low-power RISC-V chip for electronic gadgets such as wearables. The semiconductor companies, from Switzerland and... Read more.
EdgeQ Samples 5G Basestation-on-a-Chip | Sally Ward-Foxton, EE Times
EdgeQ, the startup making basestation-on-a-chip silicon and software for 5G deployments, is now sampling its chip and phy software. The company has also released... Read more.
A lightweight ISE for ChaCha on RISC-V | Ben Marshall, Daniel Page, and Thinh Hung Pham, Cryptology
ChaCha is a high-throughput stream cipher designed with the aim of ensuring high-security margins while achieving high performance on software platforms. RISC-V,... Read more.
DIY LED Cube For The Masses | Inderpreet Singh, Hackaday
No matter what the size or shape of an LED, it brings out the curiosity in every hardware nerd, and is the lifeblood of badge life around the planet. Then there... Read more.
RISC-V – A Baremetal Introduction using C++ | Phil Mulholland
What does it look like to program with no operating system? Can we have direct access to hardware using a high-level language like C++? How does RISC-V work at the... Read more.
EdgeQ samples SoC for 5G and AI inference engines | Michael Vizard, Venture Beat
EdgeQ revealed today it has begun sampling a 5G base station-on-a-chip that allows AI inference engines to run at the network edge. The goal is to make it less costly... Read more.
A First Look at RISC-V Virtualization from an Embedded Systems Perspective | Bruno Sá, José Martins, and Sandro Pinto
This article describes the first public implementation and evaluation of the latest version of the RISC-V hypervisor extension (H-extension v0.6.1) specification... Read more.
RISC-V Chip Delivers Quantum-Resistant Encryption | Charles Q. Choi, IEEE Spectrum
Many new encryption techniques seek to resist powerful attacks that could be done using future quantum computers, but these methods often require enormous processing... Read more.
Working With RISC-V | Ed Sperling, Semiconductor Engineering
RISC-V is coming on strong, but working with this open-source processor core isn’t as simple as plugging in a commercial piece of IP. Zdenek Prikryl, CTO at Codasip,... Read more.
RISC-V Wireless Chip With Adaptive Body Bias Reaches pW power | Nick Flaherty, EE News Europe
Researchers in Switzerland and Japan have developed a RISC-V wireless system on chip with anactive power consumption as low as 10µA and an ultra low power standby... Read more.