Rolf Segger on the chip shortage | Nick Flaherty , EE News Europe
Rolf Segger, founder of Segger Microcontroller, talks to Nick Flaherty at eeNews Europe about the chip shortage, RISC-V, China and the need for embedded security
Rolf... Read more.
Secure FPGA RISC-V SoC Forgoes Heatsink | William G. Wong, Electronic Design
Very-low-power FPGAs have been around for a while, but often there’s the need for those that can handle high-speed serial interfaces like PCI Express or incorporate... Read more.
SEGGER Releases Floating Point Library to Support RISC-V | Raspberry Pi Projects
SEGGER‘s stand-alone Floating-Point Library has now been extended to include an assembly-optimized variant for RISC-V implementations. The library contains a complete... Read more.
Mythic Licenses Codasip’s L30 RISC-V Core for Next-Generation AI Processor |
Codasip, the leading supplier of customizable RISC-V® embedded processor IP, announced today that Mythic, the pioneering AI processor company with breakthrough... Read more.
Researchers Develop RISC-V Chip for Quantum-Resistant Encryption | Francisco Pires, Tom’s Hardware
A research team with the Technical University of Munich (TUM) have designed a quantum cryptography chip aimed at the security demands of the quantum computing... Read more.
TUM Researchers Design Chip for ‘Post Quantum’ Cryptography | John Russell, HPC Wire
Researchers from the Technical University of Munich (TUM) have designed and commissioned fabrication of chip intended to implement so-called post-quantum cryptography.... Read more.
Video: Booting the HiFive Unmatched board | Gábor Samu
See Gábor Samu booting Ubuntu 21.04 on the SiFive HiFive Unmatched developer board. This was captured via the onboard serial port. Visit his blog for more details... Read more.
Video: Glitching RISC-V chips: MTVEC corruption for hardening ISA | Adam Zabrocki and Alex Matrosov, DEF CON 29
View the full video and description on the DEF CON YouTube Channel.
Presentation Summary: RISC-V is an open standard instruction set architecture (ISA) provided... Read more.
Open source SystemVerilog tools in ASIC designOpen source SystemVerilog tools in ASIC design
Open source hardware is undeniably undergoing a renaissance whose origin can be traced to the establishment of RISC-V Foundation (later redubbed RISC-V International).... Read more.
Video: OSDI 21 – The nanoPU: A Nanosecond Network Stack for Datacenters
The nanoPU: A Nanosecond Network Stack for Datacenters by Stephen Ibanez, Alex Mallery, Serhat Arslan, and Theo Jepsen, Stanford University; Muhammad Shahbaz, Purdue... Read more.