Video: RISC-V RV32I R-Type | Maven Silicon
This video explains the RV32I R-Type instructions.
To know more, explore Maven Silicon's RISC-V courses.
Watch the full video on YouTube.... Read more.
Custom RISC-V Processor Built in VHDL | Bryan Cockfield, Hackaday
While ARM continues to make inroads into the personal computing market against traditional chip makers like Intel and AMD, it’s not a perfect architecture and... Read more.
Ingenic T40, focusing on the new SVIoT track | Muzi, Leiphone.com
"Jun is the first chip company to focus on the SVIoT track wholeheartedly, and provide full-stack core technologies such as chips, AI computing power, development... Read more.
Video: EKF for a 9-DOF IMU on a RISC-V MCU | Hien Vu
In this video see Hien Vu demonstrate extended Kalman Filter calculation being carried out by the MCU. Calibration was done using python. Huge thanks to the author... Read more.
Designing a RISC-V CPU, Part 1: Learning hardware design as a software engineer | Hannah McLaughlin
I have no experience in digital logic design. That is, I didn't until I recently decided that I would like to try designing my own CPU and running it on an FPGA!... Read more.
SERV : RISC-V for a fistful of gates | Diode Zone
The award-winning SERV is the world's smallest RISC-V CPU. It's the perfect companion whenever you need a bit of computation and silicon real estate is at a premium.... Read more.
RISC-V Verification: The 5 Levels Of Simulation-Based Processor Hardware DV | By Lee Moore and Simon Davidmann, Semiconductor Engineering
The RISC-V open standard ISA (Instruction Set Architecture) offers developers the opportunity to configure the features and functions of a custom processor to uniquely... Read more.
ESP32-H2 Bluetooth LE & 802.15.4 RISC-V SoC shows up in ESP-IDF source code | Jean-Luc Aufranc
Espressif Systems is working on yet another RISC-V chip with ESP32-H2 SoC offering Bluetooth LE and 802.15.4 connectivity showing up in the ESP-IDF framework source... Read more.
The 2021 RISC-V Summit to Co-Locate with the 58th Design Automation Conference (DAC) in San Francisco | Yahoo! Finance
RISC-V International and the Design Automation Conference (DAC) today announced the co-location of the 2021 RISC-V Summit with the 58th DAC at Moscone West in... Read more.
Espressif’s Unannounced RISC-V ESP32-H2 LR-WPAN SoC Leaks in an SDK Update | Gareth Halfacree, Hackster.io
Eight months after a leak pre-empted the launch of the ESP32-C3, Espressif's first part to use a RISC-V core as its central processor, a new model has been discovered... Read more.