Fraunhofer IPMS RISC-V processor core for functional safety supported by development tools from IAR Systems
With its latest release of development tools for RISC-V processors, Swedish software manufacturer IAR Systems offers support for the ISO 26262 ASIL-D ready certified... Read more.
Suse Tumbleweed Gets RubyGems Updates, New systemd
A total of four openSUSE Tumbleweed snapshots have been released since the last update. Three smaller snapshots, which included a new systemd update, and one... Read more.
SBC builds on PolarFire SoC with dual GbE and CAN | Eric Brown, Linux Gizmos
Aldec announced a “TySOM-M-MPFS250” SBC that runs Linux on Microchip’s RISC-V based, FPGA equipped PolarFire SoC and offers 2x GbE, 2x FMC, 2x micro-USB, PCIe... Read more.
Video: tinyML Talks France – State of the TinyML today
The 1st TinyML meetup was held virtually as an open panel discussion with the keynote speakers. The group discussed the landscape and potential of today’s ultra-low-power... Read more.
Open Source Mindset with Michael Gielda | The Amp Hour
The Amp Hour Podcast welcomes back Antmicro's Michael Gielda who was on episode 519 talking about simulating embedded hardware using Renode
He returned to talk... Read more.
Zephyr RTOS Virtualization and Memory Isolation | Zephyr Project
Almost 700 people registered for the first-ever Zephyr Developer Summit, which took place virtually on June 8-10, to learn more about the RTOS. We had 3 tracks,... Read more.
Video: How to make a 32-bit RISC-V CPU
Watch a video tutorial showing the steps involved in creating a 32-bit RISC-V CPU.
See the full video here.... Read more.
Video: Homemade 32-bit RISC-V CPU | JLCPCB
Watch Filip Szkandera talk about a homemade 32-bit RISC-V CPU. It runs at 500 kHz, has 512 kB RAM & program memory. VGA output is black and white picture with... Read more.
Chinese chip designers hope to topple Arm’s Cortex-A76 with XiangShan RISC-V design | Gareth Halfacree, The Register
The Institute of Computing Technology at the Chinese Academy of Sciences (ICT CAS) has showcased progress on a fully open-source processor, designed around the RISC-V... Read more.
GreenWaves releases Profiler – A visualization tool for profiling and debugging GAP applications
Profiler is a part of our GAP SDK and used with GVSOC, our Full System SoC Simulator. Profiler gives you a visual view of what is happening inside the chip and allows... Read more.