SiFive Launches Advanced Trace and Debug Portfolio, SiFive Insight
SAN MATEO, Calif., Mar. 17, 2020 – SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, today announced SiFive Insight,... Read more.
Andes Technology Announces Over 5 Billion Cumulative Shipments of SoCs Embedded with Its CPU IP Since Company Inception
HSINCHU, TAIWAN – March 31, 2020 – Andes Technology (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores, announced... Read more.
With X86 / Arm Three Minutes, How Many Steps Does RISC-V Need? | Shaoyue Feng, ESMC China
https://www.esmchina.com/news/6305.html]]>... Read more.
SEGGER Announces Support for Nuclei RISC-V Processors
https://www.segger.com/news/segger-announces-support-for-nuclei-risc-v-processors/]]>... Read more.
RISC-V SoC Soft Core w/ MicroPython on MATRIX Voice FPGA | Samreen Islam, Andrés Calderón and Carlos Chacin, Hackster.io
Use the FuPy project to load a RISC-V or other SoC softcore on the MATRIX Voice’s Spartan-6 FPGA programmable through MicroPython. article: https://www.hackster.io/matrix-labs/risc-v-soc-soft-core-w-micropython-on-matrix-voice-fpga-7be85c]]>... Read more.