RISC-V’s Role In Securing IoT-Connected Devices
https://www.allaboutcircuits.com/industry-articles/risc-vs-role-in-securing-iot-devices/.]]>... Read more.
TechNode Article: China’s Chipmakers Could Use RISC-V To Reduce Impact of US
Microchip, Western Digital, Google, Nvidia, and Qualcomm, to name just a few. Through collaborative and independent projects, several members are working to create... Read more.
FierceElectronics Article: CEVA Acquires Sensor Business From InterDigital
CEVA, which licenses signal processing platforms and artificial intelligence processors for smarter, connected devices, has acquired the Hillcrest Laboratories,... Read more.
Linux Adictos Article: Linux 5.3: The New Features Of The New Kernel Version
https://www.linuxadictos.com/linux-5-3-las-nuevas-caracteristicas-de-la-nueva-version-del-kernel.html. Please note that this article is in Spanish.]]>... Read more.
All-Electronics.de Article: CEVA Acquires Sensor Specialist Hillcrest Laboratories
CEVA, licensor of signal processing platforms, acquires Hillcrest Laboratories, a provider of software and components for the operation of sensors in IoT and consumer... Read more.
Electronics Weekly Article: CEVA Buys Hillcrest Labs
CEVA, bought Hillcrest labs which specializes in the fusion of data from multiple sensors to enable intelligent systems. Hillcrest Labs’ MotionEngine software... Read more.
Leiphone Article: Bao Yungang, Institute Of Computing, Chinese Academy Of Sciences: There Is A "Dead Knot" In Open Source Chips, But This Is The Era Of Breaking The Knot | CCF-GAIR 2019
https://www.leiphone.com/news/201907/rJD9GqBS82Ty0bAv.html. Please note that the original article is in Chinese.]]>... Read more.
Elektronik Kalehti Article: Cheap Satellites With Open Source Architecture
http://elektroniikkalehti.fi/index.php/tekniset-artikkelit-2/13-news/9687-edullisia-satelliitteja-avoimella-koodilla. Please note that the original article is in... Read more.
Phoronix Article: RISC-V's Kernel Support Continues Maturing With Linux 5.3
SiFive SoCs, high-resolution timers and dynamic ticks have now made it into the default RISC-V 64-bit default configuration, and other low-level work. To read more,... Read more.