Western Digital Boasts Of “Gratifying” SweRV Response, Releases FPGA Reference Design
Western Digital has announced a strong response to the release of its RISC-V based open silicon SweRV Core, along with the availability of an official implementation... Read more.
Prohardver Article: Multi-Sheet Experimental Design Was Designed By NVIDIA To Scale Machine Learning
NVIDIA at this year’s GTC presented an experimental multi-sheet design, which is actually a chip-like concept. Although the prototype RC18 is quite simple,... Read more.
China Times Article: Andes Technology Held RISC-V Forum In May To Promote Open Source Instruction Set Architecture
Andes Technology strongly promoted the open source instruction set architecture (ISA) RISC-V. To strengthen the industry’s cooperation on RISC-V, the RISC-V... Read more.
Electronics Lab Article: SiFive Launches The World’s Smallest Commercial 64-Bit Embedded Core
SiFive, the leading provider of commercial RISC-V processor IP, yesterday announced the launch of the S2 Core IP Series at the Linley Spring Processor Conference... Read more.
Semiconductor Engineering Article: More Memory And Processor Tradeoffs
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EE Journal Article: When Tubes Were Better Than Transistors
https://www.eejournal.com/article/when-tubes-were-better-than-transistors/.]]>... Read more.
CNX Software Article: SiFive S2 RISC-V Core May Be The World’s Smallest 64-Bit Embedded Core
SiFive introduced their first RISC-V cores competing with Arm Cortex-R family of processors thanks to their S7 Series 64-bit RISC-V Core IP providing an answer to... Read more.
RISC-V Foundation Finalizes Schedule For RISC-V Workshop Zurich
ETH Zurich, on RISC-V’s potential for energy-efficient computing spanning the spectrum from microwatt embedded systems to exascale supercomputers; official updates... Read more.
SiFive Tapes Out First In A Series Of 7nm IP Enablement Platforms
SiFive, the leading provider of commercial RISC-V processor IP and custom SoC solutions, today announced it has successfully taped out an IP enablement platform... Read more.