DinoplusAI Partners With SiFive To Develop Mission-Critical AI Processor Platform For High Performance Processing With Ultra-Low Latency
SiFive, the leading provider of commercial RISC-V processor core IP, design platforms and silicon solutions, today announced that it was selected by DinoplusAI,... Read more.
UltraSoC Announces Support For Western Digital RISC-V SweRV Core And OmniXtend Cache-Coherent Interconnect
UltraSoC, the leading provider of embedded analytics for the RISC-V ecosystem, today announced full support within its embedded analytics architecture for Western... Read more.
Semiconductor Engineering Article: Week In Review: Design, Low Power
OneSpin unveiled a set of formal apps for development and assessment of RISC-V cores. The RISC-V Integrity Verification Solution formalizes the RISC-V ISA in a... Read more.
Electronics Weekly Article: UltraSoC Supports RISC-V SweRV Core
UltraSoC, the Cambridge embedded IP analytics specialist, will support Western Digital’s RISC-V SweRV Core and associated OmniXtend cache-coherent interconnect.... Read more.
SemiWiki Article: The RISC-V Revolution Is Going Global!
SiFive is greatly expanding its reach by hosting over 50 SiFive Tech Symposia in cities throughout the world. The first leg of the global tour begins in the USA.... Read more.