Support for Microchip’s RISC-V Platforms in Antmicro’s Open-Source Renode Framework and Beyond
Antmicro, our Mi-V ecosystem partner, has been cooperating with Microchip for many years now, enabling our Mi-V ecosystem with its simulation solutions. Both companies... Read more.
Andes Webinar 2023 | Andes President and CTO, Dr. Charlie Su, Andes Technology
Andes Webinar is the annual opportunity to get the information about RISC-V technology trends, innovative Andes solutions and more. Andes President and CTO, Dr.... Read more.
RISC-V Reaches a Turning Point | James Sanders and Wayne Lam, CCS Insights
RISC-V, introduced in 2010, is the first novel instruction set architecture (ISA) to gain market traction in decades. New design firms such as SiFive — founded... Read more.
Removing the Risk from RISC-V using the RISC-V Trace Standard | Peter Shields, Siemens
With the growing maturity of the RISC-V ISA, chip companies now have a wealth of options for implementing RISC-V cores in their latest product. At the same time... Read more.
El Correo Libre Issue 58 | Gareth Halfacree, FOSSSi Foundation
Preparations Begin for Latch-Up 2023 The FOSSi Foundation is very pleased to announce that Latch-Up will go ahead in 2023! This marks a triumphant return to in-person... Read more.
Espressif ESP32-P4 – A 400 MHz general-purpose dual-core RISC-V microcontroller | Jean-Luc Aufranc, CNX Software
Espressif ESP32-P4 is a general-purpose dual-core RISC-V microcontroller clocked at up to 400 MHz with AI instructions extension, numerous I/Os, and security features.... Read more.
Everyone deserves a Pinecil | Chris Person, The Verge
Learning to solder was a life-changing experience for me, but it can seem daunting. You aren’t just screwing and unscrewing parts — you are melting hot metal... Read more.
My open source silicon highlights of 2022 and goals for 2023 | Matt Venn, Zero To ASIC Course
My favourite moments of 2022 and goals and thoughts for 2023!
Watch the full video. ... Read more.
My open source silicon highlights of 2022 and goals for 2023 | Matt Venn, Zero To ASIC Course
My favourite moments of 2022 and goals and thoughts for 2023!
Watch the full video. ... Read more.
Implementation of RISCduino core using a Hierarchical Design Flow | Dinesh Annayya, OpenRoad
Dinesh Annaya is an ardent Open-Source EDA enthusiast and an expert user of OpenROAD and OpenLane. He developed a baseline RISCduino SoC, a single, 32 bit RISC-V... Read more.