HydraUSB3 RISC-V MCU board combines USB 3.0 with HSPI and SerDes high-speed interfaces | Jean-Luc Aufranc
Benjamin VERNOUX has launched the HydraUSB3 V1 board based on WCH CH569 RISC-V MCU as a developer platform to experiment with high-speed protocols like HSPI... Read more.
Milandr MDR32F02FI is a RISC-V microcontroller for (Russian) electricity meters | Jean-Luc Aufranc, CNX Software
Last year, we wrote about the Made-in-Russia Mikron MIK32 RISC-V microcontroller with features similar to STM32L0 Arm Cortex-M0+, and I was recently told that... Read more.
Low Power HW Accelerator For FP16 Matrix Multiplications For Tight Integration Within RISC-V Cores | Yvan Tortorella, Luca Bertaccini, Davide Rossi, Luca Benini, Francesco Conti
This new technical paper titled “RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs” was... Read more.
First open-source SystemVerilog RISC-V processor functional coverage library | Nick Flaherty, EE News Europe
Imperas Software in the UK has developed the first open source SystemVerilog RISC-V processor functional coverage library for RISC-V cores. The initial release is... Read more.
NSITEXE expands products lineup of RISC-V CPU supported functional safety | NSITEXE, Design and Reuse
NSITEXE, Inc. (Head Office: Minato-ku, Tokyo; CEO: Yukihide Niimi; hereinafter “NSITEXE”) has announced that it will contribute to the embedded systems by expanding... Read more.
PINE64 Formally Unveils the StarFive JH7110-Powered Star64 RISC-V Single-Board Computer | Gareth Halfacree, Hackster.io
With four processor cores, 8GB of RAM, dual gigabit Ethernet, PCIe, and a graphics processor, this StarFive JH7110-based board impresses. Open-hardware specialist... Read more.
RISC-V Global Summit Will Showcase Enormous Momentum for the Open Standard Hardware Architecture and Software Ecosystem | RISC-V International
Call for Proposals, Sponsorship Sales, and Attendee Registration Now Open
Event Spans December 12th through 15th; Summit Sessions Are December 13th and 14th
San... Read more.
Architectures for Matrix Extension in CPU | Jiang Zhao, Alibaba Cloud
Recent rapid development of various applications represented by Deep Learning (DL) calls for a much-needed increase in established chip matrix computing capability.... Read more.
Porting GNOME OS to Microchip’s PolarFire® SoC FPGA Icicle Kit for the First Time | Microchip
Customers often require support to bring up new boards and architectures on Linux. Our Mi-V ecosystem partner, Codethink’s specialty is board bring-up and they... Read more.
Andes Technology RISC-V Processors Reveal Outstanding Performance and Efficiency in MLPerf Tiny | Andes Technology
Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores... Read more.