Desk of Ladyada – It’s a RISC-V kinda weekend #DeskOfLadyada #Adafruit
This weekend we ended up working a lot on two RISC-V designs in a push to get the final PCBs out the door. First up is the CH32v203 QT Py....... Read more.
RISC-V Summit Europe 2024
Germany was buzzing this week. No, not because of the Euros. Munich also hosted the 2024 edition of the RISC-V Summit Europe, and Codethink was in town! RISC-V Summit... Read more.
[VIDEO] RISC-V NAS: BPI-F3 & OpenMediaVault
RAID RISC-V NAS built using a Banana Pi BPI-F3 single board computer and a JMB582 PCIe to SATA adapter. Watch the video.... Read more.
Sunny skies and electric energy: RISC-V Summit Europe 2024 shines in Munich
This week, the 2024 edition of RISC-V Summit Europe took place in lovely Munich, Germany. Those of us who attended last year’s edition in Barcelona might not have... Read more.
RISC-V Summit Europe News—Processor IP, Verification Tools, and More
At every point in the design process, RISC-V developers can make use of the advancements presented at RISC-V Summit Europe. It’s been a big week for open-source... Read more.
SiFive Essential Product Family Expanded at the RISC-V Summit Europe
Munich, Germany. SiFive, Inc. announced an innovative design of its SiFive Essential product family at the RISC-V Summit Europe 2024. With over a decade of development,... Read more.
RISC-V Verification: From Simulation To Formal
Axiomise’s Nicky Khodadad and Ashish Darbari discuss simulation and the need for formal verification and RISC-V, including why simulation-based verification is... Read more.
SiFive announces 4th-gen of popular essential product line to spur innovation across embedded applications
SiFive is seeing growing adoption, with more than two billion SiFive RISC-V-based chips already in the market. SiFive, Inc. the gold standard for RISC-V computing,... Read more.
Developers Use RISC-V Stack Without Worrying About Local SRAMs, DMAs
Semidynamics Tensor Unit efficiency data for its “All-In-One” AI IP, which uses a LlaMA-2 7B-parameter Large Language Model (LLM), has been made public. Roger... Read more.
ESWIN Computing Pairs SiFive CPU, Imagination GPU and In House NPU in Latest RISC-V Edge Computing SoC
Combining IP from two RISC-V leaders with an independently developed NPU brings advanced AI acceleration and rich user interfaces to ESWIN Computing’s EIC77 Series... Read more.