StarFive has just announced customers’ delivery of the 64-bit RISC-V Dubhe core based on RV64GC ISA plus bit manipulation, user-level interrupts, as well as the latest Vector 1.0 (V) and…
The activity around creating a legit graphics processor for RISC-V chip designs, an emerging competitor to x86 and ARM, is gaining steam. Special interest groups at RISC-V next year will…
Building on top of the flexibility that was the original premise of Renode, our open source simulation framework has for some years now been used for pre-silicon development, architectural exploration and…
San Francisco, U.S. – Dec. 8, 2021- at RISC-V Summit 2021, StarFive Technology Co., Ltd. (hereinafter “StarFive”), the leader of RISC-V software and hardware ecosystem in China, announced that “VisionFive”…
HiSilicon is a Huawei-owned semiconductor company. It is known for Kirin-branded mobile SoCs that once powered a myriad of HUAWEI and HONOR smartphones. This division has now announced a new chipset for FHD TVs.…
Building on the earlier Performance P550 processor, company engineering estimates are that it will have 40% more performance per clock cycle – to 11+SPECInt2006/GHz – and it has architecture enhancements…
Taking place in San Francisco from Monday through yesterday evening was the RISC-V Summit for discussions around this dominant open-source processor ISA. For those that did not make it to…
SCANDIANO, Italy, Dec. 9, 2021 — E4 Computer Engineering builds on 20+ years of developing and integrating innovative technologies and announces Monte Cimone, a cluster aimed at enabling the co-design of…
As one of the main driving forces behind the RISC-V architecture, SiFive tends to introduce and showcase RISC-V solutions not available from anyone else in the industry. This week the…
StarFive has launched its 64-bit RISC-V “Dubhe” core with up to 2GHz @ 12nm performance plus Vector and Hypervisor extensions. Meanwhile, the Chinese Academy of Sciences announced a similarly Linux-friendly,…