In the Media

NSITEXE, Inc. (headquartered in Minato Ward, Tokyo, Japan; President and CEO: Yukihide Niimi; hereinafter “NSITEXE”) announced that the DR1000C, a RISC-V based parallel processor IP with vector extension (DFP: Data…

RISC-V is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. This development in the semiconductor market has been an area of much…

The push for autonomous vehicles has seen a lot of momentum for 2021. Aiming to keep it going is a new AI chip from Kneron that claims to bring the…

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Vector architectures lack tools for research. Consider the gem5 simulator, which is possibly the leading platform for computer-system architecture research. Unfortunately, gem5 does not have an available distribution that includes…

Processing-using-memory (PuM) techniques leverage the analog operation of memory cells to perform computation. Several recent works have demonstrated PuM techniques in off-the-shelf DRAM devices. Since DRAM is the dominant memory…

Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading RISC-V CPU IP supplier, announced today that it successfully issued its overseas depositary receipts (GDR) on the Luxembourg Stock Exchange…

RT-Thread IoT OS, a leading open-source operating system platform for the Internet of Things (IoT), today announced it has joined RISC-V International, a global open hardware standards organization, to help…

Codasip, the leading supplier of customizable RISC-V processor IP, today announced that Dr Karel Masařík, company founder responsible for the development of Codasip’s core technology, has been elected to the…

As a part of our interview series called “Women Of The C-Suite,” we had the pleasure of interviewing Calista Redmond. Calista Redmond is the CEO of RISC-V International with a…