In the Media

Last month I received Microchip PolarFire SoC FPGA Icicle development kit that features PolarFire SoC FPGA with a Penta–core 64-bit RISC-V CPU subsystem and an FPGA with 254K LE, and booted it…

Sipeed and Alibaba T-Head have opened $399 pre-orders on an “RVB-ICE” dev kit featuring a RISC-V compatible, dual-core, 1.2GHz XuanTie C910 ICE SoC with a Vivante 3D GPU, an NPU,…

Bluespec, Inc., a founding member of RISC-V International and supplier of RISC-V Processor IP and tools, released the MCU RISC-V processor family targeted at ultra-low resource utilization on Xilinx FPGAs.…

Recently, RISC-V development Codasip announced that it will be looking to hire 100 engineers in the UK to continue its development with RISC-V IP cores. Who is Codasip, why are…

Intel updated its lineup of the famous Nios soft processors with the latest Nios V softcore, designed around the open-source RISC-V instruction set architecture. The Nios family of processors is Intel's…

Port of the JVM to the open-source licensed instruction set architecture could be ready later this year, if project gets approval to proceed. The RISC-V hardware instruction set would get…

The EPI project has 28 partners from 10 European countries, with the goal of making EU achieve independence in HPC chip technologies and HPC infrastructure. 43 of the EPAC1.0 RISC-V…

A few weeks ago I finally received the HiFive Unmatched from SiFive as their flagship RISC-V development board. As a reminder this is their mini-ITX development board that is powered…

Data center workloads are quickly evolving, demanding high compute density with varying mixes of compute, memory and IO capability. This is driving architectures that are moving away from a one-size-fits-all…