RISC-V International, a global open hardware standards organization, today announced the launch of the Open Hardware Diversity Alliance. The global Alliance, created by CHIPS Alliance, OpenPOWER Foundation,RISC-V, and Western Digital,…
This video explains the RV32I B-Type instructions. To know more, explore our RISC-V courses, https://elearn.maven-silicon.com/risc-v RISC-V is growing rapidly, follow this RISC-V video blog series to obtain knowledge…
The number of connected IoT devices exceeded 46 billion in 2021 and is expected to reach a remarkable 125 billion by 2030. This will shift the semiconductor market significantly as…
“Embedded Linux people build custom Linux systems.” Thats how things are, right? And yeah, they do that a real lot for sure. But why invest all that effort? Aren’t there…
An Instruction Set Architecture (ISA) is like the DNA of a computer. It’s what makes Arm®-based processors Arm, x86-based CPUs Intel®, and so on. RISC-V is a free and open…
The SweRVolf project, a fully open system-on-chip designed as a reference platform for Western Digital's RISC-V SweRV cores, has announced a major new release promising lower barriers to entry for…
The semiconductor ecosystem is at a turning point for how to best architect the CPU based on the explosion of data, the increased usage of AI, and the need for…
Scalable High-Performance Computing SoC Design with RISC-V Whether you refer to the design concept as a disaggregated die, tiles, chiplets, or good ol’ multi-chip modules, a growing trend among SoC…
ZAYA is a secure operating system that creates a TEE (Trusted Execution Environment) to manage all sensitive operations and resources securely. ZAYA supports and follows IoT Security Certifications such as…
Open source hardware is undeniably undergoing a renaissance whose origin can be traced to the establishment of RISC-V Foundation (later redubbed RISC-V International). The open ISA and ecosystem, in which…