In the Media

This talk will be about a 32-bit homemade RISC-V CPU, made only out of discrete logic components and memories. There are no FPGAs nor any microcontrollers used and the whole…

CAES, a leader in advanced mission-critical electronics for aerospace and defense, announced today that it has been awarded a contract from Vinnova, a Swedish government agency dedicated to promoting innovation, to…

As a strategic member, Agile Analog expects to widen access to its application- and process-optimised analog IP for smart and IoT devices. Agile Analog, a supplier of highly configurable process…

Computer scientist René Rebe has patched the Linux kernel to bring support for AMD's RDNA2-based Radeon RX 6700XT graphics card to RISC-V systems — starting with the HiFive Unmatched board.…

If you have been working on open standard RISC-V ISA CPU cores, there is a high chance that you have come across WARP-V. For newbies, WARP-V is a RISC-V CPU…

Beagleboard.org has joined forces with Seeed and StarFive to launch the Beagle V . The Beagle V has the advantage of being a low cost board that allows developers to access RISC…

Imperas Software Ltd., the leader in RISC-V processor verification technology, announces the latest updates to riscvOVPsimPlus with support for the near ratified P extension and architectural validation test suites. The P (or Packed…

The Challenge A guiding light in the RISC-V community, SiFive was preparing to launch a new quad-core processor and evaluation board. Preorders were accumulating on Mouser and customers were eager…

With its release of development tools for RISC-V processors, IAR Systems supports the ISO 26262 ASIL-D ready certified RISC-V processor core 'EMSA5-FS' of the Fraunhofer Institute for Photonic Microsystems IPMS.…

Russia's Yadro and subsidiary Syntacore have announced an effort to develop homegrown processors based on the free and open RISC-V architecture. A report in local newspaper Ведомости, first spotted in the…