University of Michigan’s MORPHEUS technology emerges unscathed from bug bounty effort.| Medium Read An “unhackable” computer chip lived up to its name in its first bug bounty competition, foiling over 500…
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Munich, Germany – March 16th, 2021 – Codasip, the leading supplier of customizable RISC‑V processor IP, announced that semiconductor industry veteran Dr Ron Black has joined Codasip as Executive Chairman of…
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This article is derived from a talk at the RISC-V Summit in December 2020 that Bill McSpadden, principal verification engineer at Seagate Technology, gave on the challenges and experiences his team…
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AI vision processing moving to the edge is an undeniable industry trend. OpenFive, the custom silicon business unit of SiFive, discusses this trend with compelling facts in their recent paper…
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RISC-V is having itself a moment. What began as an effort to produce an open-source ISA for low-end microcontrollers and other simple kinds of chips is becoming a genuine ecosystem.…
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In the fourth episode of PineTalk, Ezra and Peter discuss Matrix video calling on the PinePhone, open source GPUs on RISC-V and go though your Twitter feedback concerning what you'd…
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University of Michigan's Morpheus chip has passed its stiffest security test to far. The dangerous-titled 'unhackable' processor has survived its biggest hacking test remarkably unscathed. Created by the University of…
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As some readers may know, we've been working on porting Xen to RISC-V. This blog looks at why we care about RISC-V and how RISC-V satisfies what is needed from…
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Read the full article to see all 7 things!
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Today, OpenHW Group and Mitacs announced OpenHW Accelerate, a $22.5M multi-year co-funded research program, the world’s first open-source hardware research program of its kind. OpenHW Accelerate will drive research in…
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