In the Media

The open-source revolution is expanding beyond software into hardware design. New microcontrollers from Microchip Technology and Espressif incorporate processors based on RISC-V—an open-source instruction set architecture challenging Arm’s dominance in connected devices. RISC-V,…

It’s an exciting time to be involved in open source.  Linux powers the world’s most critical devices, a story to which Red Hat has always been a champion.  Today we…

LDRA has extended support for the RISC-V instruction set architecture (ISA) in its high assurance quality analysis and verification tool suite. The LDRA static analysis tools support emerging RISC-V implementations such as…

Nick Flaherty talks to Calista Redmond, CEO of RISC-V International, on how the European Chips Act is driving the open instruction set architecture forward. “The recent European summit showed the…

Lauterbach has extended their industry leading TRACE32® debug and trace tools to include support for Synopsys’ RISC-V instruction set based ARC-V™ processor IP, which includes full debug and trace, including…

Real time applications such as space or automotive where instant autonomous decision making is crucial require configurable standardized interrupt controllers. There are many well-known examples such as the Global Interrupt…

Those looking for PC management solutions like KVMs, particularly in the server space, may be interested to hear of Sipeed's new KVM expansion card, which just opened up for preorders…

Speaker: Yungang Bao. Deputy Director, Institute of Computing Technology, Chinese Academy of Sciences. Chief Scientist, Beijing Institute of Open Source Chip. It is widely recognized that the open-source hardware ecosystem…

CORE-V-VERIF is an open-source project supported by the OpenHW Group. Its goal is to provide an open-source environment and work-flow that can be deployed onto any RISC-V processor core. Since…