In the Media

When I got these new RISC-V ESP32 boards in my mail, I asked myself: Is this new technology revolutionary as written everywhere? What are the advantages for a typical Maker?…

EDACafe discussion with Calista Redmond View here.

Diosix bridges two interesting and emerging worlds of technology: Rust and RISC-V. As a bare-metal, type-1 hypervisor, Diosix strives to bring the security, reliability, and speed of Rust to the…

Presented by Pete Alexander, John Holden, Harry Cooper, Byron Theobald, Aaryaman Bhattacharya, Matthew Johns, University of Southampton The open-source RISC-V instruction set architecture is gaining interest throughout industry and academia.…

SUNNYVALE, Calif., Feb. 12, 2021 /PRNewswire/ -- Today, Micro Magic, Inc. announced its Ultra Low power 64-bit RISC-V core consuming only 10mW at 1Ghz. Micro Magic's design techniques allow its 5GHz processor to run…

This webinar was arranged to bring awareness and to tell the importance of RISC-V to Pakistani students. This presentation includes: RISC-V introduction RISC-V achievements globally OpenSource tools Contribution in RISC-V…

In the previous post, we considered how you could create an optimized ISA for a domain-specific processor core by profiling software and experimenting with adding/removing instructions. Using the open RISC-V ISA can be…

In 2020, although the COVID-19 pandemic had a severe impact on the global economy, Andes Technology still made significant advances and achievements in the development of RISC-V. As a leading…

We just got our hands on some engineering pre-samples of the ESP32-C3 chip and modules, and there’s a lot to like about this chip. The question is what should you compare…

RISC-V has grabbed headlines recently as the open-source technology is now viewed as a hotbed for innovation. It is also a source of intellectual properties (IP) freely open to the…