Xobs, one of the lead engineers behind the Precursor project, at the last Hackaday Superconference - back in the seemingly distant past when we still had in-person events! Read the full…
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Munich, Germany – December 4th, 2020 – Codasip, the leading supplier of customizable RISC-V® processor IP, today announces three new 64-bit RISC-V application processor cores: the A70XP™ provides support for RISC-V P extensions, and…
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Michael Gielda of Antmicro and the CHIPS Alliance! Listen to the podcast.]]>
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Micro Magic Inc.—a small electronic design firm in Sunnyvale, California—has produced a prototype CPU that is several times more efficient than world-leading competitors, while retaining reasonable raw performance. We first noticed…
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riscvOVPsimPlus™ includes latest reference model and now offers expanded simulation features for debug & trace for early software development and hardware verification. Oxford, UK – December 4th, 2020 – Imperas Software Ltd.,…
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keynote session including our partners and RISC-V International members, and giving talks describing our efforts aimed at improving the RISC-V tooling ecosystem. Read the full article.]]>
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PULP Platform The Parallel Ultra Low Power (PULP) Platform started as a joint effort between the Integrated Systems Laboratory (IIS) of ETH Zürich and the Energy-Efficient Embedded Systems (EEES) group…
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HSINCHU, TAIWAN AND OXFORD, UK – December 03, 2020 – Andes Technology Corp., a leading supplier of performance-efficient and extensible 32/64-bit RISC-V CPU cores and a Founding Premier member of the…
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