Spanish RISC-V IP developer Semidynamics has benchmarked the performance of its Tensor Unit running a LlaMA-2 7B-parameter Large Language Model (LLM) on an ‘all in one’ RISC-V AI IP core.…
SAN DIEGO, June 25, 2024 /PRNewswire/ -- X-Silicon is demonstrating the 1st Vulkan™ Software Rendering Platform capability running on the RISC-V Architecture. This opens up a new segment of low-power…
SiFive is seeing growing adoption, with more than two billion SiFive RISC-V based chips already in the market Munich, Germany, June 25, 2024 – Today SiFive, Inc. the gold standard for…
Spanish RISC-V IP developer Semidynamics has benchmarked the performance of its Tensor Unit running a LlaMA-2 7B-parameter Large Language Model (LLM) on an ‘all in one’ RISC-V AI IP core…
June-24 2024, RISC-V European Summit, Munich, Germany. Embedded tools developer Ashling today announced support for the Renesas R9AG021 RISC-V MCUs from Renesas in Ashling’s RiscFree software development kit (SDK) and…
MUNICH, Germany – June 24, 2024 – RISC-V International, the global open standards organization, announced that Andrea Gallo has joined as the organization’s new vice president of Technology. Gallo heads…
Industry Veteran Brings Software and Hardware Experience to Role Guiding all RISC-V Technical Activities MUNICH, Germany – June 24, 2024 – RISC-V International, the global open standards organization, announced that Andrea Gallo…
Veyron Solution — World’s Highest Performance Data RISC-V Processor and Platform — Will Be Showcased Throughout Event CUPERTINO, Calif. – June 24, 2024 – Ventana Micro Systems Inc., provider of…
RISC-V is an open standard instruction set architecture that has potential to be widely used as an alternative to existing ARM and x86 solutions. For the software developers it's beneficial…
Industry-leading RISC-V solutions and live demonstrations of CPU IP are all on display at Booth #8. Discover the latest advancements from Andes’ presentations and posters! Munich, Germany – June 21,…