Munich, Germany, 1 February 2024 – Codasip®, the leader in RISC-V Custom Compute, announced today that it has achieved certification for the functional safety standard ISO 26262 as well as…
Processor Akurra, modifies the standard RISC-V architecture and instruction set to support their memory allocation technology. VyperCore, a UK-based startup located in Bristol, has achieved a significant milestone in the…
SAN JOSE, Calif., Jan. 30, 2024 /PRNewswire/ -- RISC-V is a free, open RISC instruction set architecture (ISA) that is currently gaining popularity due to its high performance, flexibility, and cost-efficiency. RISC-V advantages are…
RISC-V is revolutionising edge computing and fundamentally reshaping the broader computing landscape by promoting innovation, collaboration, and democratisation. RISC-V, an open-source instruction set architecture (ISA), is emerging as a significant…
By Mark Himelstein , CTO, RISC-V International Mark Himelstein What are the top five trends for the RISC-V open standard ISA in 2024? This year has been a great one…
RISC-V is revolutionising edge computing and fundamentally reshaping the broader computing landscape by promoting innovation, collaboration, and democratisation. RISC-V, an open-source instruction set architecture (ISA), is emerging as a significant…
EDA is transforming from a staid but strategic sector into a hot investment market, fueled by strong earnings and growth, a clamoring for leading-edge and increasingly customized designs across new…
With Linus Torvalds back to work, merged to mainline on Wednesday were the RISC-V architecture updates for the in-development Linux 6.8 kernel cycle. One of the features for RISC-V with Linux 6.8 is…
The last time we spoke with Sandi Habinc, General Manager, and Jan Andersson, Director of Engineering at Frontgrade Gaisler, we were discussing the TRISAT-R CubeSat and Gaisler’s use of RISC-V’s open standard instruction set…