In the Media

Limerick, Ireland. 29th May 2023 - Ashling announced today that Ashling’s RiscFree SDK now provides target debug support for MachineWare’s SIM-V RISC-V Instruction Set Simulator. RiscFree is Ashling’s SDK including…

The Atrevido 423 has a wider, 4-way pipeline, allowing for the decoding and retirement of up to two times more instructions than its recently launched, 2-way, 223 core. It is…

Ashling has added support for RISC-V soft IP cores from Lattice Semiconductor to its RiscFree development tool. The RiscFree software development kit (SDK) includes an IDE, compiler and debugger, which…

The SiFive RISC-V Automotive CPU IP continues to advance to address and enable automotive applications like infotainment, connectivity and advanced driver-assistance systems. Yet without the right tools, embedded software developers…

Soooo… you’ve decided you’re going to create a system-on-chip (SoC) device of such awesomeness that it will leave your competitors gnashing their teeth and rending their garb. You’ve also decided…

Semidynamics in Spain has developed a customisable 4-way RISC-V 64bit core for data centre chips. The Atrevido 423 RISC-V core has a wide 4-way pipeline for decoding and retiring twice…

Andes’ new deep-learning accelerator addresses convolutional neural networks in edge applications. Accompanied by vector CPUs, it forms an AI subsystem that can be scaled up for higher vision- and audio-workload…