Configurable high-bandwidth RISC-V cores with vector units can be made to directly address challenging applications like machine learning, AI, and other cutting-edge spaces. Semidynamics is a European supplier of RISC-V IP…
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eeNews Europe is meeting up with Gerard Rauwerda, Business Developer with Technolution. We discuss the RISC-V developments over the years and the role Technolution played, but also what specific requirements…
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Take time for the The RISC-V Summit in Barcelona and connect the dots of this Open Instruction Set Architecture In 2017 we had the opportunity to interview Krste Asanovic about…
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Agile Analog has brought together its customisable IP blocks to create the first complete analog IP subsystem for battery-powered RISC-V chips. The initial subsystem includes all the analog IP required…
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Agile Analog is offering the first complete analog IP subsystem for RISC-V applications at the RISC-V Summit Europe in Barcelona. The initial subsystem includes all the analog IP required for a typical…
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Semidynamics announces high-performance RISC-V IP. Semidynamics has introduced one of the industry's first RISC-V vector units that could be used for highly parallel processors, such as those used for artificial intelligence (AI),…
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Ventana Micro Systems Inc., provider of the highest performance RISC-V processors, today announced its Founder and CEO Balaji Baktha is providing the RISC-V Summit Europe keynote speech at 10:00am on June 6. Ventana will be…
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RISC-V is an open source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. Codethink has been working with the RISC-V CPU architecture for several years. We've…
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RISC-V represents an existential threat to Arm, and a new industry consortium plans to increase that threat of extinction by accelerating the development of open-source software for the RISC-V architecture.…
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T-Head, the chip unit of Alibaba Group Holding, has joined a global initiative to develop a software ecosystem and accelerate commercialisation for RISC-V, as the open-source chip design architecture is…
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