Thank You For Attending RISC-V Summit North America! | Missed the event? Watch Now.

No recent posts listed
Intel Will Offer SiFive RISC-V CPUs on 7nm, Plans Own Dev Platform | Joel Hruska, ExtremeTech

Intel and SiFive made a pair of announcements yesterday that underscore how serious the chip giant is about ramping its own foundry services. First, Intel…

Bluetrum Launches RT-Thread-Based Arduino Uno-Like RISC-V Development Board, the AB32VG1 | Gareth Halfacree, hackster.io

Sub-$13 system comes with RT-Thread Studio IDE support, audio capabilities, and even an infrared receiver. Chinese electronics specialist Bluetrum has announced the launch of a…

Video: Arm vs RISC-V-What You Need to Know | Gary Explains

Arm is a RISC Instruction Set Architecture (ISA) and simultaneously a company that designs RISC CPU cores. RISC-V is also a RISC ISA, but not…

EPI Chair Jean-Marc Denis Shares Vision for Future Supercomputers | Tiffany Trader

In this video interview with HPCwire’s Managing Editor Tiffany Trader, Jean-Marc Denis, European Processor Initiative (EPI) chair of the board and head of strategy at…

Intel to Adopt SiFive’s New High-Performance P550 RISC-V Cores With 7nm Platform | Paul Alcorn, Tom’s Hardware

SiFive, the leading designer of chips based on the open source RISC-V architecture, announced its new SiFive Performance line of chips today that support 64-bit…

NEORV32: a customizable RISC-V SoC #RISCV #FPGA

The NEORV32 Processor is a customizable microcontroller-like system on chip (SoC) that is based on the RISC-V NEORV32 CPU. The project is intended as auxiliary…

SiFive Boasts of the “Highest-Performance RISC-V Processor” in Its New P550 Design | Gareth Halfacree, hackster.io

Company claims its latest part is the highest-performing RISC-V core around — but won't be releasing the design under an open license. RISC-V pioneer SiFive…

Canonical enables Ubuntu on SiFive’s HiFive RISC-V boards

With Canonical announcing Ubuntu support for so much new hardware, the announcement of Ubuntu ported to a new architecture can go unnoticed. But today, we…

Extended development tools performance capabilities for Andes RISC-V cores

Extended development tools performance capabilities for Andes RISC-V cores Latest version of IAR Embedded Workbench for RISC-V adds support for latest Andes RISC-V processor technology,…

IAR Systems extends development tools performance capabilities for Andes RISC-V cores

Latest version of IAR Embedded Workbench for RISC-V adds support for latest Andes RISC-V processor technology, including AndeStar™ V5 RISC-V Performance Extension Uppsala, Sweden—June 23,…

Intel to Adopt SiFive’s New High-Performance P550 RISC-V Cores With 7nm Platform | Paul Alcorn, Tom’s Hardware

SiFive, the leading designer of chips based on the open source RISC-V architecture, announced its new SiFive Performance line of chips today that support 64-bit…

Codasip Announces A71X RISC-V Application Core with Dual-Issue Capability

Munich, Germany – June 22, 2021 – Codasip, the leading supplier of customizable RISC-V® processor IP, today announces a new major version of its most…

No recent posts listed
No recent posts listed
No recent posts listed
Codasip announces RISC-V processor cores providing multi-core and SIMD capabilities | new electronics

Codasip, a supplier of customisable RISC-V processor IP, has unveiled three new 64-bit RISC-V application processor cores: the A70XP, the A70X‑MP and the A70XP‑MP that…

SiFive HiFive Unmatched RISC-V PC: Up for pre-order now, ships in early 2021 following a spec bump | Brad Linder, Liliputing

HiFive Unmatched is a computer powered by the company’s Freedom U740 processor, the most powerful RISC-V processor commercially available at the moment. First unveiled in October, the…

Seagate Designs RISC-V Cores to Power Data Mobility and Trustworthiness | businesswire

BUSINESS WIRE)--Seagate Technology plc (NASDAQ: STX) announced that it has designed two processors based on the open RISC-V instruction set architecture (ISA). One of the…

RISC-V: 1000-Kern-Beschleuniger, Server-Karte und Effizienz-Champion (German) | Heise

Am heutigen Dienstagabend startet der virtuelle RISC-V Summit 2020. Die Firma Esperanto Technologies des einstigen Transmeta-Gründers Dave Ditzel stellt dort einen KI-Beschleuniger für PCI-Express-Karten mit…

Silicon Labs selects Imperas RISC-V Reference Model for verification | Imperas

Oxford, UK – December 8th, 2020 – Imperas Software Ltd., the leader in RISC-V processor verification technology, today confirmed the selection by Silicon Labs (NASDAQ: SLAB) of…

Spatial : Sysgo va porter son OS temps réel PikeOS sur les cœurs de processeur Leon et RISC-V de Cobham (French) | Pierrick Arlot , L'Embarqué

Sysgo et Cobham Gaisler ont saisi l’occasion du RISC-V Summit, qui se tient du 8 au 10 décembre, pour annoncer leur collaboration. Objectif : assurer le portage du système…

SiFive's RISC-V HiFive Unmatched Upgraded To Ship With 16GB Of RAM | Michael Larabel, Phoronix

announced the HiFive Unmatched development board as the best RISC-V development board we've seen to date. But only having 8GB of RAM was one of the…

Andes va coupler la technologie eFPGA du français Menta à ses cœurs de processeur RISC-V (French) | Andes Technology

Menta, spécialiste des technologies FPGA embarquées (eFPGA), s’est engagée dans une coopération technologique avec Andes Technology, membre fondateur de l’organisme RISC-V International et l’un des principaux…

C-DAC Selects Valtrix STING For Design Verification Of RISC-V Based Microprocessors | Valtrix Systems

BANGALORE, INDIA, Dec. 8, 2020 /PRNewswire/ -- Valtrix Systems, provider of design verification products for building functionally correct CPU and system-on-chip implementations, announced today that Centre for…

C-DAC Selects Valtrix STING For Design Verification Of RISC-V Based Microprocessors | Cision

BANGALORE, INDIA, Dec. 7, 2020 /PRNewswire/ -- Valtrix Systems, provider of design verification products for building functionally correct CPU and system-on-chip implementations, announced today that Centre for…