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First fully coherent RISC-V Tensor unit for AI chip design
Semidynamics launches first fully-coherent RISC-V Tensor unit to supercharge AI applications
Codasip announces next-generation RISC-V processor family for Custom ComputeTenstorrent’s vision for the AI Revolution: Conversation with Chief CPU Architect Lien Wei-hanResearch Consortium sets Standards in the Field of Open Source Hardware: Open Tools used for a Security ChipWhat is RISC-V and how will it redefine your next-gen wearable tech?
Andes Technology Unveils Andes D23 and N225 Cores Pioneering the Next Generation of Compact, Performant, and Secure RISC-V Processor Technology
Qualcomm to Bring RISC-V Based Wearable Platform to Wear OS by GoogleQualcomm Adopts RISC-V for Next-Gen Snapdragon Wear PlatformSharpRISCV Overview: A Browser-Based RISC-V Assembler for Seamless Learning and Exploration
Codasip announces next-generation RISC-V processor family for Custom ComputeCodasip 700 RISC-V processor family: Bringing the world of Custom Compute to everyone
SiFive Gives WorldGuard to RISC-V International to Make this Robust Security Model More Accessible to the RISC-V Community
Imagination launches IMG CXM, the smallest GPU to bring effortless user interfaces into homes
Esperanto Technologies Expands Global Partner Network
Meta details its first custom RISC-V AI siliconUbuntu on VisionFive 2 RISC-V single board computer
Milk-V’s Pioneer Is a Tall Glass of Cold RISC-V with 64 Cores, Up to 128GB of RAM
MTIA v1: Meta’s first-generation AI inference accelerator
China’s semiconductor developers eye shift to RISC-V architecture amid growing chip demand in cars, data centres and AI, executive saysYunhao Zhang’s Egos-2000 Packs an Entire RISC-V Operating System Into Just 2,000 Lines of Code
India’s RISC-V startup InCore receives funding from Sequoia CapitalAndes Technology Announces The New Product Line, AndesAIRE™, Ultimately Efficient AI/ML Solutions For Edge And End-Point InferenceYunhao Zhang’s Egos-2000 Packs an Entire RISC-V Operating System Into Just 2,000 Lines of Code
First fully coherent RISC-V Tensor unit for AI chip designSemiDynamics in Spain has developed a RISC-V Tensor Unit for AI chip design based on its fully customisable 64bit cores. The RISC-V Tensor unit is…
Semidynamics launches first fully-coherent RISC-V Tensor unit to supercharge AI applicationsBarcelona, Spain – 24 October, 2023. Semidynamics has just announced a RISC-V Tensor Unit that is designed for ultra-fast AI solutions and is based on its…
Codasip announces next-generation RISC-V processor family for Custom ComputeIntroducing the highly flexible 700 family for unlimited innovation Munich, Germany, 17 October 2023 – Codasip, the leader in RISC-V Custom Compute, announced today a…
Tenstorrent’s vision for the AI Revolution: Conversation with Chief CPU Architect Lien Wei-hanIn a rapidly evolving technological landscape, the convergence of artificial intelligence (AI) and hardware is reshaping how people perceive computing and its potential applications. Lien…
Research Consortium sets Standards in the Field of Open Source Hardware: Open Tools used for a Security ChipThe security chip (at the middle of the bottom) is built in flip-chip technology on an auxiliary board and plugged into a standard socket on…
What is RISC-V and how will it redefine your next-gen wearable tech?When discussing computer hardware, x86, and ARM are household names when discussing microprocessor architecture. They've been around for decades and are still going strong, powering…
Andes Technology Unveils Andes D23 and N225 Cores Pioneering the Next Generation of Compact, Performant, and Secure RISC-V Processor TechnologyHsinchu, Taiwan – Oct. 17, 2023 – Andes Technology, the renowned supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and a Founding Premier member of RISC-V…
Qualcomm to Bring RISC-V Based Wearable Platform to Wear OS by GoogleHighlights: Qualcomm and Google are extending their collaboration on wearables by developing a RISC-V Snapdragon Wear™ platform that will power next-generation Wear OS solutions. Work…
Qualcomm Adopts RISC-V for Next-Gen Snapdragon Wear PlatformQualcomm and Google announced that they had agreed to expand their partnership to development of a Snapdragon Wear platform based on the RISC-V instruction set…
SharpRISCV Overview: A Browser-Based RISC-V Assembler for Seamless Learning and ExplorationIn the ever-evolving landscape of computer architecture, RISC-V stands out as an open-source instruction set architecture that offers flexibility and adaptability. To facilitate learning and…
Codasip announces next-generation RISC-V processor family for Custom ComputeMunich, Germany -- October 17, 2023 – Codasip®, the leader in RISC-V Custom Compute, announced today a new highly configurable family of RISC-V baseline processors for…
Codasip 700 RISC-V processor family: Bringing the world of Custom Compute to everyoneToday, technology innovators must have new ways to create differentiated products. How are they supposed to meet the demand for more computational performance when semiconductor scaling…
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SiFive Gives WorldGuard to RISC-V International to Make this Robust Security Model More Accessible to the RISC-V CommunitySANTA CLARA, Calif.--(BUSINESS WIRE)--SiFive, Inc., the pioneer and leader of RISC-V computing, today announced the company is giving the WorldGuard security model to RISC-V International,…
Imagination launches IMG CXM, the smallest GPU to bring effortless user interfaces into homesNew RISC-V compatible IMG CXM cores with native support for HDR driving down costs in the DTV and wider consumer market Imagination Technologies is bringing seamless…
Esperanto Technologies Expands Global Partner NetworkMOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Esperanto Technologies™, the leading developer of high performance, energy-efficient artificial intelligence (AI) solutions based on the RISC-V instruction set, today announced that…
Meta details its first custom RISC-V AI siliconMeta has revealed details of the first chip it designed in house using RISC-V to run AI frameworks for its Facebook and Instagram services. The…
Ubuntu on VisionFive 2 RISC-V single board computerCanonical published the optimised Ubuntu release for StarFive’s VisionFive 2, the world’s first high-performance RISC-V single board computer (SBC) with an integrated GPU. Read the full…
Milk-V’s Pioneer Is a Tall Glass of Cold RISC-V with 64 Cores, Up to 128GB of RAMChinese hardware company Milk-V Technology is preparing to launch a high-performance RISC-V computer with a difference: the Pioneer packs in 64 physical cores and supports…
MTIA v1: Meta’s first-generation AI inference acceleratorAI workloads are ubiquitous at Meta — forming the basis for a wide range of use cases, including content understanding, Feeds, generative AI, and ads ranking. These…
China’s semiconductor developers eye shift to RISC-V architecture amid growing chip demand in cars, data centres and AI, executive saysChina’s growing demand for semiconductors used in electric vehicles, high-end servers in data centres and artificial intelligence applications provides a vast opportunity for RISC-V processors to flourish, according to a proponent of the open-source,…
Yunhao Zhang’s Egos-2000 Packs an Entire RISC-V Operating System Into Just 2,000 Lines of CodeSoftware engineer and Cornell PhD candidate Yunhao Zhang has developed an operating system with a difference: packing its features into just 2,000 lines of code,…
India’s RISC-V startup InCore receives funding from Sequoia CapitalIndia-based RISC-V fabless chip startup InCore Semiconductors received funding from Sequoia Capital India, the second deal that the venture capital firm invested in India's semiconductor…
Andes Technology Announces The New Product Line, AndesAIRE™, Ultimately Efficient AI/ML Solutions For Edge And End-Point InferenceHSINCHU, TAIWAN — May 15, 2023 — Andes Technology (TWSE:6533), a leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V…
Yunhao Zhang’s Egos-2000 Packs an Entire RISC-V Operating System Into Just 2,000 Lines of CodeSoftware engineer and Cornell PhD candidate Yunhao Zhang has developed an operating system with a difference: packing its features into just 2,000 lines of code,…