RISC-V, the open standard instruction set architecture (ISA) alternative to Intel and ARM, held its first European summit on 5 to 9 June 2023 in Barcelona.
Originally developed in 2010 at University of California, Berkeley, Risc-V is an open source hardware and software platform managed by RISC-V International, which is optimised for system on a chip (SoC) -based computers. The architecture is based on chiplets, which are components that can be packaged on a single chip to add the functionality required by a hardware designer. The RISC-V processor architecture comprises 50 reduced instruction set (Risc) instructions that run a full open-source software stack.
