RISC-V Now! by Andes | Shanghai
RISC-V Now! is the conference focused on turning RISC-V standards into products that ship — where spec goes to scale. Built for Practitioners RISC-V Now! addresses the realities of moving...
IoT
RISC-V Now! by Andes | Beijing
RISC-V Now! is the conference focused on turning RISC-V standards into products that ship — where spec goes to scale. Built for Practitioners RISC-V Now! addresses the realities of moving...
All About Circuits: Upbeat Technology’s RISC-V MCU Takes Flight With Near-Threshold Computing
Developed with SiFive, the dual-core SoC uses patented error correction to achieve a record 16.8 µW/MHz/DMIPS, targeting next-gen wearables, drones, and IoT sensors. In a move aimed at the growing...
EETimes: Google Open-Sources NPU IP, Synaptics Implements It
Google Research has open-sourced its Coral NPU IP (previously codenamed Kelvin), which it is giving to the industry in a bid to accelerate edge AI implementations by reducing fragmentation and...
22nm RISC-V AI Chip Targets Wearables and IoT
EMASS has introduced the ECS-DoT, a 22nm microprocessor designed to bring milliWatt-scale intelligence directly to edge and IoT devices.
X-Silicon Introduces the World’s First Vulkan Driver Implementation for RISC-V, Enabling an entire Ecosystem of 3D Graphics, AI and Compute for Low-Power, Mobile, Edge and IOT Devices
SAN DIEGO, June 25, 2024 /PRNewswire/ — X-Silicon is demonstrating the 1st Vulkan™ Software Rendering Platform capability running on the RISC-V Architecture. This opens up a new segment of low-power...
Celebrating IoTDay: How RISC-V Enables IoT Innovation
For the past two decades the Internet of Things (IoT), a term coined by MIT Auto-ID Lab Co-founder Kevin Ashton, has become one of the industry’s hottest buzzwords. With an...