This video demonstrates high performance and asynchronous clocking using HAPS®-100 and HAPS ProtoCompiler software. The design uses a RISC-V Rocket System integrated highspeed DDR 4, and Synopsys DW PCIE Gen EP and RC, as well as other peripherals.
Thank You For Attending RISC-V Summit North America! | Missed the event? Watch Now.
Anisha is part of the RISC-V International marketing team, responsible for managing social media and tracking the latest updates from our members. She brings more than seven years of experience in digital marketing and communications strategy to the team.
This video demonstrates high performance and asynchronous clocking using HAPS®-100 and HAPS ProtoCompiler software. The design uses a RISC-V Rocket System integrated highspeed DDR 4, and Synopsys DW PCIE Gen EP and RC, as well as other peripherals.
In the Media
ChannelLife: Edge AI, security & RISC-V to redefine IoT chips by 2026
In the Media
Electronic Design: Checking Out the RISC-V Summit North America 2025
In the Media
Semiconductor Engineering: Why Openness Matters For AI At The Edge
Copyright © RISC-V International®. All rights reserved. RISC-V, RISC-V International, and the RISC-V logos are trademarks of RISC-V International.
For trademark usage guidelines, please see our Brand Guidelines and Privacy Policy. Code of Conduct Policy. Antitrust Policy.