Fabless semiconductor company XMOS has designed the 4th generation of its Xcore architecture to be RISC-V compatible.
The company’s microarchitecture enables creation of a system-on-chip (SoC) using software programmability, allocating on-chip resources between DSP, AI acceleration and control functions, mixing and matching to meet the needs of the application, XMOS CEO Mark Lippett told EE Times.
