RISC-V Ecosystem Events

RISC-V Workshop in Barcelona

RISC-V Workshop in Barcelona 7-10 May, 2018 Co-hosted By Co-sponsored By The RISC-V Foundation invites you to attend the RISC-V Workshop in Barcelona, Spain on 7-10 May, 2018. Co-hosted by the Barcelona Supercomputing Center (BSC) and Universitat Politècnica de Catalunya (UPC), and co-sponsored by NXP and Western Digital, the RISC-V Workshop in Barcelona will gather the RISC-V ecosystem to share notable RISC-V updates, projects and implementations.Keynote sessions will include Robert Oshana,…

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RISC-V Foundation Announces Agenda For Workshop In Barcelona

Workshop features more than 30 tutorials, presentations, networking receptions and a tour of the Barcelona Supercomputing CenterWHAT: RISC-V Workshop in Barcelona, Spain WHERE: Universitat Politècnica de Catalunya, Campus Nord, Vertex Building AuditoriumWHEN: Monday, May 7 to Wednesday, May 9, 2018DETAILS: Co-hosted by the Barcelona Supercomputing Center and the Universitat Politècnica de Catalunya (UPC), the RISC-V Workshop in Barcelona gathers the RISC-V ecosystem to share notable RISC-V updates, projects and implementations….

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Register for the Upcoming RISC-V Workshop in Barcelona: May 7-10, 2018

About the WorkshopRegistration is now open for the RISC-V Workshop in Barcelona, co-hosted by the Barcelona Supercomputing Center (BSC) and Universitat Politècnica de Catalunya (UPC) May 7-10, 2018. The event will be sponsored by NXP and Western Digital.As with past workshops, this event will bring together the RISC-V community to share RISC-V activities underway around the globe, and build consensus on the future evolution of the instruction set. Co-Hosted By …

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RISC-V Ecosystem to Present at 15th International System-on-Chip (SoC) Conference, Exhibit & Workshops

Six Companies from the RISC-V Ecosystem to Host Speaking Sessions at Conference WHERE:The 15th International System-on-Chip (SoC) Conference, Exhibit & Workshops, University of California, Irvine (UCI) , Irvine, Calif., 92697, Calit2 Building 2 WHEN:Wednesday, Oct. 18 to Thursday, Oct. 19, 2017 WHAT:The RISC-V Foundation will feature six member organizations at this year’s International SoC Conference. Ted Speers, VP and Head of Product Architecture and Planning for Microsemi SoC Group, a…

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IIT Madras RIC2017 April 2017

   Under the auspices of the IIT Madras Computer Architecture Initiative and the SHAKTI Processor Project, the team at IIT Madras will host RIC2017 (RISC-V International Conference 2017) this coming April 2nd and 3rd, 2017 in Chennai India.The event Program Committee has plans for a rich technical program covering RISC-V related topics such as : SoC Fabrics IP Blocks Verification Environment Physical Design Flow HW and SW Security support Low Power Systems…

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Open Source Silicon with RISC-V March 2017

Munich Germany – Join the creators of RISC-V, lowRISC  and the FOSSi Foundation for an afternoon event on Thursday March 23rd, 2017 to learn about their projects, open-source digital hardware and related activities. The RISC-V ISA is free and open, designed by professionals and allows custom extensions. It is now governed by the RISC-V Foundation with many industry members. Among the emerging open implementations, lowRISC aims at creating a fully…

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