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RISC-V Summit Europe 2025 · Paris, France - 12-15 May · Learn More

RISC-V Everywhere

RISC-V International is the non-profit home of the open standard RISC-V Instruction Set Architecture (ISA), related specifications, and stakeholder community.

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There are many ways to get involved with RISC-V

Specification

The RISC-V instruction set architecture (ISA) and related specifications are developed, ratified and maintained by contributing members and technical working groups.

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Developers

For organizations and individuals interested in contributing as a developer, learn more about RISC-V training programs, working groups, and our ambassador and advocacy programs.

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Membership

RISC-V International is changing the way the industry works together and collaborates. Learn more about supporting the industry’s future de facto ISA for design innovation.

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Meet us at an upcoming event

This October, the global RISC-V community – including technical, industry, domain, ecosystem and special interest groups who define the architecture’s specifications – will meet in Santa Clara, California to share technology breakthroughs, industry milestones, and case studies, as well as to network and build relationships. Come be part of the RISC-V movement.

October 22-23, 2024
Santa Clara, California
#RISCVSummit #RISCVEverywhere

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Get certified in RISC-V

RISC-V Fundamentals (LFD210) + RISC-V Foundational Associate (RVFA) Exam Bundle

This course is designed for computer engineers and programmers looking to acquire the knowledge and skills necessary to work with RISC-V processors and software, giving you a competitive edge in the job market. This course is an essential learning experience for anyone looking to enhance their career in the tech industry.

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RVFA Certificate

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Building on a Legacy of Security: Introducing Polar-VPX

SundanceDSP, a leading provider of high-performance FPGA-based solutions, is proud to announce the latest addition to its product lineup: Polar-VPX. This cutting-edge 3U VPX form-factor SOSA-aligned device uses the power of Microchip’s PolarFire® System-on-Chip Field-Programmable Gate Array (SoC FPGA) to deliver unparalleled security, performance, and efficiency for embedded systems development.…

Soft Tiling RISC-V Processor Clusters Speed Design and Reduce Risk

By John Min    John Min is VP of Customer Success at Arteris. He possesses architectural expertise that enables the successful management of design trade-offs in power, size, and performance across both customizable and standard processors. His background includes designing CPU SoCs utilizing ARC, MIPS, x86, and custom media processors,…