By Calista Redmond, Chief Executive Officer of the RISC-V Foundation
At the literal heart of technology sits a silicon core, combined with general and specific instructions and connections. The enormous cost, risk, development time, necessary volumes and limited computing demands has kept the lucrative chip industry within reach of just a handful of companies – focused mostly on general purpose processors. Fast forward to today and we are witnessing an incredible transformation in CPU design that’s taking place as the industry embraces open software and silicon. This change has been driven in part by the growing computing demands of artificial intelligence, machine learning, the Internet of Things and VR/AR. New computing needs in various power and performance dimensions have increased the overall demand and competition for custom processors purpose-built for specific application needs. Additionally, since legacy instruction set architectures (ISAs) are decades old, they are not designed to handle the latest workloads (e.g. Artificial Intelligence, Machine Learning, HPC, etc.). After the RISC-V ISA emerged from the computer labs at UC Berkeley in California, interest in RISC-V has been gaining steam with commercial implementations and adoption rapidly growing. It has been incredible to witness how RISC-V has fostered industry-wide collaboration to solve tomorrow’s design needs, including some of the toughest challenges like security. Here’s why RISC-V is changing the face of the silicon industry. The RISC-V ISA allows us to start with a clean sheet of paper and optimize designs for new workloads, ushering in a new era of silicon design and processor innovation through open standard collaboration. This open source approach to silicon has many benefits. We’ve seen that RISC-V:1) Unlocks architecture and enables innovation since RISC-V is a layered and extensible ISA, companies can easily implement the minimal instruction set, well defined extensions and custom extensions to create custom processors for these new and innovative workloads
2) Reduces risk and investment via leverage of established and common IP building blocks with a growing set of shared tools and development resources with an engaged development community.
3) Creates opportunities to create thousands of possible custom processors as implementation is not defined at the ISA level, but rather by the composition of the SoC and other design attributes. It’s possible to go big, small, powerful, or lightweight.
4) Accelerates time to market through collaboration and open source IP reuse, this not only reduces development expense, but accelerates time to market.
RISC-V accelerates development time, while reducing strategic risk and overall costs, enabling companies to reap a variety of benefits from the free and open ISA. At the RISC-V Foundation we’re committed to driving this RISC-V revolution forward. With more than 325 RISC-V Foundation members in 28 countries around the world, RISC-V is visibly disrupting global innovation. There are already a wide variety of RISC-V implementations in industry and academia, designed into applications including graphics engines, machine learning and AI, networking, storage, security, embedded and custom processors. To continue this incredible progress, the Foundation is focused on a few key areas: driving progression of ratified specs, compliance suite, and other technical deliverables; growing the overall ecosystem / membership; and deepening community engagement and visibility. For more information about RISC-V, please see my keynote presentation from Open Source Summit Japan 2019 below: I encourage everyone who’s interested in RISC-V to participate in the dynamic RISC-V events happening around the world. You can join a Meetup group and attend our regional events. I also welcome you to come to the RISC-V Summit 2019, taking place Dec. 9-12, 2019 at the San Jose Convention Center in San Jose, Calif. At the RISC-V Summit, thousands of RISC-V enthusiasts from dozens of countries will meet for a multi-track conference featuring keynotes, tutorials, exhibitions and networking receptions. Click here to register; if you book your ticket by Aug. 26 you’ll even receive a discount. Let’s stay connected! Please follow RISC-V @risc_v and me @calista_redmond on Twitter And if you are not already a member, organizations, individuals and technology enthusiasts are welcome to join our dynamic ecosystem. Click here to learn how you can become a member and join the RISC-V revolution.]]>