6th RISC-V Workshop May 8-11, 2017
Workshop Sold Out
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[clear]Registration and the call for presentations / posters for the 6th RISC-V Workshop, co-hosted by NVIDIA and the Shanghai Jiao Tong University (SJTU) in Shanghai China on May 8-11, 2017 is now closed and the workshop is sold out. As with past workshops, our goals for these events are to bring the RISC-V community together to share information about recent activity in the various RISC-V projects underway around the globe, and build consensus on the future evolution of the instruction set.
This will be a four day event broken down as follow:
Recommended Hotel: Chateau Star River Shanghai Minhang]]>
- Monday May 8, 2017 – Introduction to RISC-V – this day long session is intended for those who are new to RISC-V and have yet to be exposed to the RISC-V ISA. The session will consist of presentations from the RISC-V Foundation, some of the original creators of the RISC-V ISA and product presentations from vendors within the RISC-V community.
- Tuesday and Wednesday May 9-10, 2017 – These two days will follow our traditional two day format with presentations covering various RISC-V projects underway within the RISC-V community and will include a poster / demo reception on Tuesday evening.
- Thursday May 11, 2017 – The workshop week will conclude with RISC-V Foundation meetings with attendance restricted to members of the RISC-V Foundation. The day will consist of Technical and Marketing Committee face to face meetings to progress the work currently underway within our various Task Groups.