The need for more flexible and scalable processor architectures in the semiconductor industry continues to rise, contributing to the steady growth in the adoption of RISC-V. Originally developed at the University of California, Berkeley, the open-source RISC-V instruction set architecture (ISA) has become very popular in recent years. RISC-V allows designers to customize their processor implementations to meet the specific needs of their target applications. By selecting the extensions they want to use for their design, developers can optimize for power, performance, and/or area (PPA). RISC-V also allows the addition of custom instructions, allowing designers to develop and add instructions for specific use cases, for example, AI or automotive, and differentiate their designs. Adoption by chip developers of the RISC-V architecture, with its openness, choices, and technical benefits, continues to accelerate. The SHD Group, in a forthcoming report, anticipates a 40% CAGR for SoCs with RISC-V processors between 2023 and 2030.