Krste Asanović, Chairman, RISC-V Foundation Memory consistency models (MCMs) are known to flummox even experienced computer architects, so it is perhaps not surprising that recent news articles had some difficulty portraying…
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Registration and the call for presentations / posters for the 6th RISC-V Workshop, co-hosted by NVIDIA and the Shanghai Jiao Tong University (SJTU) in Shanghai China on May 8-11, 2017 is now…
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Proceedings for the 5th RISC-V Workshop, hosted at Google’s Quad campus in Mountain View, California on November 29-30, 2016 are now available with links to the slide presentations…
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Registration remains open and the call for presentations / posters is now closed for the 5th RISC-V Workshop, hosted at Google’s Quad campus (468 Ellis Street, Mountain View, CA 94043)…
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