Sivakumar P R, Founder and CEO, Maven Silicon, delivered an insightful keynote speech titled ‘Journeying Beyond AI: Unleashing the Art of Verification’ at the DVCon India 2023.
Sivakumar begins his keynote by explaining the transformative journey of the AI-driven semiconductor industry. How the evolution of AI with Generative AI – LLMs and ML in EDA transforms the semiconductor industry and creates new business opportunities for the growth of the semiconductor business. How this transformative journey supports the semiconductor industry to emerge as a trillion-dollar market by 2030, fueled by the creation of complex chips using AI-driven EDA, System of Chips (SoCs) utilizing Chiplets with UCIe, and cutting-edge 2.5D & 3D advanced packaging techniques.
Inspiring the next generation of DV engineers by explaining the future of the AI-driven semiconductor industry, he then explores the innovations in the electronic system design by OEMs like Apple, how it uses RISC processors for its MacBook’s M-series SoCs, Why RISC-V, and How RISC-V will emerge as an industry-standard ISA for all kinds of processors and support the OEMs. He explains why system-level design knowledge is essential for DV engineers’ long-term careers in this discussion.
In this keynote, Sivakumar walks the DV engineers through various case studies like Bluetooth VIP, RISC-V IP Verification Flow using formal verification, UVM TB, and FPGA Prototyping, and SoC verification flow. In this technical discussion, he explains how DV engineers can unleash their creative potential to explore the art of verification by exploiting the AI-driven EDA for mundane tasks like debugging and coverage closure. Finally, he inspires the DV engineers with his quote, ‘Let’s design AI chips and let AI implement its AI chips’, envisioning the DV engineers emerging as chip architects who drive the chip design process with a semi/fully automated implementation flow with an AI-driven EDA.
Watch this insightful keynote session video:- Journeying Beyond AI: Unleashing the Art of Verification