SELENE Hardware Platform First Release | SELENE H2020 Project
This repository holds the SELENE hardware platform.
Remember to clone this repository recursively, as interconnect/axi and interconnect/common_cells are submodules.... Read more.
建構基於RISC-V的MCU「芯」生態 | 作者 : 顧正書，EE Times China
最近大學、研究機構、晶片廠商和網際網路巨頭紛紛採用和支持RISC-V這一有希望與Arm抗衡的指令集架構(ISA)…儘管建構RISC-V... Read more.
How to run Ockam on RISC-V Linux | Ockam
In this hands-on guide, we'll show how to cross compile a Rust example of Ockam for RISC-V Linux systems. We'll also see how to test RISC-V Linux programs using... Read more.
NSITEXE DR1000C, a RISC-V based parallel processor IP with vector extension (DFP: Data Flow Processor) has been licensed for Renesas’ new RH850/U2B Automotive MCUs | NSITEXE
NSITEXE, Inc. (headquartered in Minato Ward, Tokyo, Japan; President and CEO: Yukihide Niimi; hereinafter “NSITEXE”) announced that the DR1000C, a RISC-V based... Read more.
5 Talks on RISC-V Online Event | Veriest
RISC-V is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles.
This development in the semiconductor... Read more.
Kneron’s RISC-V AI Chip Intends to Bring L1 and L2 Autonomy to “Any Vehicle” | Jake Hertz, All About Circuits
The push for autonomous vehicles has seen a lot of momentum for 2021. Aiming to keep it going is a new AI chip from Kneron that claims to bring the capacity for... Read more.
Video: Firefox 94 on Unmatched RISCV64 Linux Desktop! | Bits inside by René Rebe
Watch the full video. ... Read more.
A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures | Cristóbal Ramírez Lazo, César Alejandro Hernández, Oscar Palomar, Osman Sabri Unsal, Marco Antonio Ramírez, and Adrían Cristal
Vector architectures lack tools for research. Consider the gem5 simulator, which is possibly the leading platform for computer-system architecture research. Unfortunately,... Read more.
PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM | Ataberk Olgun, Juan Gómez Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oğuz Ergin, and Onur Mutlu
Processing-using-memory (PuM) techniques leverage the analog operation of memory cells to perform computation. Several recent works have demonstrated PuM techniques... Read more.
Andes Technology Issues GDR to Be Listed on Luxembourg | Andes Technologies
Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading RISC-V CPU IP supplier, announced today that it successfully issued its overseas... Read more.